498-mtd-spi-nor-locking-support-for-MX25L6405D.patch 1.5 KB

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  1. From 8bf2ce6ea4ee840b70f55a27f80e1cd308051b13 Mon Sep 17 00:00:00 2001
  2. From: Nick Hainke <[email protected]>
  3. Date: Mon, 27 Dec 2021 00:38:13 +0100
  4. Subject: [PATCH 1/2] mtd: spi-nor: locking support for MX25L6405D
  5. Macronix MX25L6405D supports locking with four block-protection bits.
  6. Currently, the driver only sets three bits. If the bootloader does not
  7. sustain the flash chip in an unlocked state, the flash might be
  8. non-writeable. Add the corresponding flag to enable locking support with
  9. four bits in the status register.
  10. Tested on Nanostation M2 XM.
  11. Similar to commit 7ea40b54e83b ("mtd: spi-nor: enable locking support for
  12. MX25L12805D")
  13. Signed-off-by: David Bauer <[email protected]>
  14. Signed-off-by: Nick Hainke <[email protected]>
  15. ---
  16. drivers/mtd/spi-nor/macronix.c | 3 ++-
  17. 1 file changed, 2 insertions(+), 1 deletion(-)
  18. --- a/drivers/mtd/spi-nor/macronix.c
  19. +++ b/drivers/mtd/spi-nor/macronix.c
  20. @@ -41,7 +41,8 @@ static const struct flash_info macronix_
  21. { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
  22. { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
  23. { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
  24. - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
  25. + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K |
  26. + SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) },
  27. { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) },
  28. { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64,
  29. SECT_4K | SPI_NOR_DUAL_READ |