qcom-ipq4018-ap120c-ac.dts 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "ALFA Network AP120C-AC";
  8. compatible = "alfa-network,ap120c-ac";
  9. aliases {
  10. led-boot = &status;
  11. led-failsafe = &status;
  12. led-running = &status;
  13. led-upgrade = &status;
  14. };
  15. keys {
  16. compatible = "gpio-keys";
  17. reset {
  18. label = "reset";
  19. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  20. linux,code = <KEY_RESTART>;
  21. };
  22. };
  23. leds {
  24. compatible = "gpio-leds";
  25. status: status {
  26. label = "blue:status";
  27. gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  28. default-state = "keep";
  29. };
  30. wan {
  31. label = "amber:wan";
  32. gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  33. };
  34. wlan2g {
  35. label = "green:wlan2g";
  36. gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  37. linux,default-trigger = "phy0tpt";
  38. };
  39. wlan5g {
  40. label = "red:wlan5g";
  41. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  42. linux,default-trigger = "phy1tpt";
  43. };
  44. };
  45. soc {
  46. rng@22000 {
  47. status = "okay";
  48. };
  49. mdio@90000 {
  50. status = "okay";
  51. pinctrl-0 = <&mdio_pins>;
  52. pinctrl-names = "default";
  53. };
  54. ess-psgmii@98000 {
  55. status = "okay";
  56. };
  57. counter@4a1000 {
  58. compatible = "qcom,qca-gcnt";
  59. reg = <0x4a1000 0x4>;
  60. };
  61. tcsr@1949000 {
  62. compatible = "qcom,tcsr";
  63. reg = <0x1949000 0x100>;
  64. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  65. };
  66. tcsr@194b000 {
  67. compatible = "qcom,tcsr";
  68. reg = <0x194b000 0x100>;
  69. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  70. };
  71. ess_tcsr@1953000 {
  72. compatible = "qcom,tcsr";
  73. reg = <0x1953000 0x1000>;
  74. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  75. };
  76. tcsr@1957000 {
  77. compatible = "qcom,tcsr";
  78. reg = <0x1957000 0x100>;
  79. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  80. };
  81. usb2@60f8800 {
  82. status = "okay";
  83. };
  84. usb3@8af8800 {
  85. status = "okay";
  86. dwc3@8a00000 {
  87. phys = <&usb3_hs_phy>;
  88. phy-names = "usb2-phy";
  89. };
  90. };
  91. crypto@8e3a000 {
  92. status = "okay";
  93. };
  94. watchdog@b017000 {
  95. status = "okay";
  96. };
  97. ess-switch@c000000 {
  98. status = "okay";
  99. switch_lan_bmp = <0x10>;
  100. switch_wan_bmp = <0x20>;
  101. };
  102. edma@c080000 {
  103. status = "okay";
  104. };
  105. };
  106. };
  107. &blsp_dma {
  108. status = "okay";
  109. };
  110. &blsp1_i2c3 {
  111. status = "okay";
  112. pinctrl-0 = <&i2c0_pins>;
  113. pinctrl-names = "default";
  114. tpm@29 {
  115. compatible = "atmel,at97sc3204t";
  116. reg = <0x29>;
  117. };
  118. };
  119. &blsp1_spi1 {
  120. status = "okay";
  121. pinctrl-0 = <&spi0_pins>;
  122. pinctrl-names = "default";
  123. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
  124. <&tlmm 4 GPIO_ACTIVE_HIGH>;
  125. flash@0 {
  126. compatible = "jedec,spi-nor";
  127. reg = <0>;
  128. spi-max-frequency = <24000000>;
  129. partitions {
  130. compatible = "fixed-partitions";
  131. #address-cells = <1>;
  132. #size-cells = <1>;
  133. partition@0 {
  134. label = "SBL1";
  135. reg = <0x00000000 0x00040000>;
  136. read-only;
  137. };
  138. partition@40000 {
  139. label = "MIBIB";
  140. reg = <0x00040000 0x00020000>;
  141. read-only;
  142. };
  143. partition@60000 {
  144. label = "QSEE";
  145. reg = <0x00060000 0x00060000>;
  146. read-only;
  147. };
  148. partition@c0000 {
  149. label = "CDT";
  150. reg = <0x000c0000 0x00010000>;
  151. read-only;
  152. };
  153. partition@d0000 {
  154. label = "DDRPARAMS";
  155. reg = <0x000d0000 0x00010000>;
  156. read-only;
  157. };
  158. partition@e0000 {
  159. label = "APPSBLENV";
  160. reg = <0x000e0000 0x00010000>;
  161. };
  162. partition@f0000 {
  163. label = "APPSBL";
  164. reg = <0x000f0000 0x00080000>;
  165. read-only;
  166. };
  167. partition@170000 {
  168. label = "ART";
  169. reg = <0x00170000 0x00010000>;
  170. read-only;
  171. };
  172. partition@180000 {
  173. label = "priv_data1";
  174. reg = <0x00180000 0x00010000>;
  175. read-only;
  176. };
  177. partition@190000 {
  178. label = "priv_data2";
  179. reg = <0x00190000 0x00010000>;
  180. read-only;
  181. };
  182. };
  183. };
  184. nand@1 {
  185. compatible = "spi-nand";
  186. reg = <1>;
  187. spi-max-frequency = <24000000>;
  188. partitions {
  189. compatible = "fixed-partitions";
  190. #address-cells = <1>;
  191. #size-cells = <1>;
  192. partition@0 {
  193. label = "rootfs1";
  194. reg = <0x00000000 0x04000000>;
  195. };
  196. partition@4000000 {
  197. label = "rootfs2";
  198. reg = <0x04000000 0x04000000>;
  199. };
  200. };
  201. };
  202. };
  203. &blsp1_uart1 {
  204. status = "okay";
  205. pinctrl-0 = <&serial0_pins>;
  206. pinctrl-names = "default";
  207. };
  208. &cryptobam {
  209. status = "okay";
  210. };
  211. &ethphy4 {
  212. gpio-controller;
  213. #gpio-cells = <2>;
  214. };
  215. &gmac0 {
  216. qcom,forced_duplex = <1>;
  217. qcom,forced_speed = <1000>;
  218. qcom,phy_mdio_addr = <3>;
  219. qcom,poll_required = <1>;
  220. vlan_tag = <1 0x10>;
  221. };
  222. &gmac1 {
  223. qcom,forced_duplex = <1>;
  224. qcom,forced_speed = <1000>;
  225. qcom,phy_mdio_addr = <4>;
  226. qcom,poll_required = <1>;
  227. vlan_tag = <2 0x20>;
  228. };
  229. &tlmm {
  230. i2c0_pins: i2c0_pinmux {
  231. mux_i2c {
  232. function = "blsp_i2c0";
  233. pins = "gpio58", "gpio59";
  234. drive-strength = <16>;
  235. bias-disable;
  236. };
  237. };
  238. mdio_pins: mdio_pinmux {
  239. mux_mdio {
  240. pins = "gpio53";
  241. function = "mdio";
  242. bias-pull-up;
  243. };
  244. mux_mdc {
  245. pins = "gpio52";
  246. function = "mdc";
  247. bias-pull-up;
  248. };
  249. };
  250. serial0_pins: serial0_pinmux {
  251. mux_uart {
  252. pins = "gpio60", "gpio61";
  253. function = "blsp_uart0";
  254. bias-disable;
  255. };
  256. };
  257. spi0_pins: spi0_pinmux {
  258. mux_spi {
  259. function = "blsp_spi0";
  260. pins = "gpio55", "gpio56", "gpio57";
  261. drive-strength = <12>;
  262. bias-disable;
  263. };
  264. mux_cs {
  265. function = "gpio";
  266. pins = "gpio54", "gpio4";
  267. drive-strength = <2>;
  268. bias-disable;
  269. output-high;
  270. };
  271. };
  272. };
  273. &usb2_hs_phy {
  274. status = "okay";
  275. };
  276. &usb3_hs_phy {
  277. status = "okay";
  278. };
  279. &wifi0 {
  280. status = "okay";
  281. };
  282. &wifi1 {
  283. status = "okay";
  284. qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
  285. };