qcom-ipq4018-gl-ap1300.dts 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "GL.iNet GL-AP1300";
  8. compatible = "glinet,gl-ap1300";
  9. aliases {
  10. led-boot = &led_power;
  11. led-failsafe = &led_power;
  12. led-running = &led_power;
  13. led-upgrade = &led_power;
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = <0x80000000 0x10000000>;
  18. };
  19. chosen {
  20. bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
  21. };
  22. soc {
  23. rng@22000 {
  24. status = "okay";
  25. };
  26. mdio@90000 {
  27. status = "okay";
  28. };
  29. ess-psgmii@98000 {
  30. status = "okay";
  31. };
  32. tcsr@1949000 {
  33. compatible = "qcom,tcsr";
  34. reg = <0x1949000 0x100>;
  35. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  36. };
  37. tcsr@194b000 {
  38. /* select hostmode */
  39. compatible = "qcom,tcsr";
  40. reg = <0x194b000 0x100>;
  41. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  42. status = "okay";
  43. };
  44. ess_tcsr@1953000 {
  45. compatible = "qcom,tcsr";
  46. reg = <0x1953000 0x1000>;
  47. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  48. };
  49. tcsr@1957000 {
  50. compatible = "qcom,tcsr";
  51. reg = <0x1957000 0x100>;
  52. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  53. };
  54. usb2@60f8800 {
  55. status = "okay";
  56. };
  57. usb3@8af8800 {
  58. status = "okay";
  59. };
  60. crypto@8e3a000 {
  61. status = "okay";
  62. };
  63. watchdog@b017000 {
  64. status = "okay";
  65. };
  66. ess-switch@c000000 {
  67. status = "okay";
  68. switch_lan_bmp = <0x18>;
  69. switch_wan_bmp = <0x20>;
  70. };
  71. edma@c080000 {
  72. status = "okay";
  73. };
  74. };
  75. keys {
  76. compatible = "gpio-keys";
  77. reset {
  78. label = "reset";
  79. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  80. linux,code = <KEY_RESTART>;
  81. };
  82. };
  83. leds {
  84. compatible = "gpio-leds";
  85. led_power: power {
  86. label = "green:power";
  87. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  88. default-state = "on";
  89. };
  90. wan {
  91. label = "green:wan";
  92. gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  93. };
  94. };
  95. };
  96. &blsp_dma {
  97. status = "okay";
  98. };
  99. &cryptobam {
  100. status = "okay";
  101. };
  102. &blsp1_spi1 {
  103. status = "okay";
  104. pinctrl-0 = <&spi0_pins>;
  105. pinctrl-names = "default";
  106. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;
  107. flash@0 {
  108. status = "okay";
  109. compatible = "jedec,spi-nor";
  110. reg = <0>;
  111. spi-max-frequency = <24000000>;
  112. partitions {
  113. compatible = "fixed-partitions";
  114. #address-cells = <1>;
  115. #size-cells = <1>;
  116. partition@0 {
  117. label = "SBL1";
  118. reg = <0x00000000 0x00040000>;
  119. read-only;
  120. };
  121. partition@40000 {
  122. label = "MIBIB";
  123. reg = <0x00040000 0x00020000>;
  124. read-only;
  125. };
  126. partition@60000 {
  127. label = "QSEE";
  128. reg = <0x00060000 0x00060000>;
  129. read-only;
  130. };
  131. partition@c0000 {
  132. label = "CDT";
  133. reg = <0x000c0000 0x00010000>;
  134. read-only;
  135. };
  136. partition@d0000 {
  137. label = "DDRPARAMS";
  138. reg = <0x000d0000 0x00010000>;
  139. read-only;
  140. };
  141. partition@e0000 {
  142. label = "APPSBLENV"; /* uboot env*/
  143. reg = <0x000e0000 0x00010000>;
  144. };
  145. partition@f0000 {
  146. label = "APPSBL"; /* uboot */
  147. reg = <0x000f0000 0x00080000>;
  148. read-only;
  149. };
  150. partition@170000 {
  151. label = "ART";
  152. reg = <0x00170000 0x00010000>;
  153. read-only;
  154. };
  155. };
  156. };
  157. spi-nand@1 {
  158. status = "okay";
  159. compatible = "spi-nand";
  160. reg = <1>;
  161. spi-max-frequency = <24000000>;
  162. partitions {
  163. compatible = "fixed-partitions";
  164. #address-cells = <1>;
  165. #size-cells = <1>;
  166. partition@0 {
  167. label = "ubi";
  168. reg = <0x00000000 0x08000000>;
  169. };
  170. };
  171. };
  172. };
  173. &blsp1_uart1 {
  174. pinctrl-0 = <&serial_pins>;
  175. pinctrl-names = "default";
  176. status = "okay";
  177. };
  178. &tlmm {
  179. serial_pins: serial_pinmux {
  180. mux {
  181. pins = "gpio60", "gpio61";
  182. function = "blsp_uart0";
  183. bias-disable;
  184. };
  185. };
  186. spi0_pins: spi0_pinmux {
  187. mux_spi {
  188. function = "blsp_spi0";
  189. pins = "gpio55", "gpio56", "gpio57";
  190. drive-strength = <12>;
  191. bias-disable;
  192. };
  193. mux_cs {
  194. function = "gpio";
  195. pins = "gpio54", "gpio5";
  196. drive-strength = <2>;
  197. bias-disable;
  198. output-high;
  199. };
  200. };
  201. };
  202. &usb2_hs_phy {
  203. status = "okay";
  204. };
  205. &usb3_hs_phy {
  206. status = "okay";
  207. };
  208. &usb3_ss_phy {
  209. status = "okay";
  210. };
  211. &wifi0 {
  212. status = "okay";
  213. qcom,ath10k-calibration-variant = "GL-AP1300";
  214. };
  215. &wifi1 {
  216. status = "okay";
  217. qcom,ath10k-calibration-variant = "GL-AP1300";
  218. };