qcom-ipq4018-wrtq-329acn.dts 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "Luma Home WRTQ-329ACN";
  8. compatible = "luma,wrtq-329acn";
  9. i2c-gpio {
  10. compatible = "i2c-gpio";
  11. sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  12. scl-gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  13. #address-cells = <1>;
  14. #size-cells = <0>;
  15. /* No driver exists */
  16. led_ring@48 {
  17. compatible = "ti,msp430";
  18. reg = <0x48>;
  19. };
  20. eeprom@50 {
  21. compatible = "atmel,24c16";
  22. reg = <0x50>;
  23. pagesize = <16>;
  24. read-only;
  25. };
  26. };
  27. keys {
  28. compatible = "gpio-keys";
  29. reset {
  30. label = "reset";
  31. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  32. linux,code = <KEY_RESTART>;
  33. };
  34. };
  35. soc {
  36. rng@22000 {
  37. status = "okay";
  38. };
  39. mdio@90000 {
  40. status = "okay";
  41. /delete-node/ ethernet-phy@0;
  42. /delete-node/ ethernet-phy@1;
  43. /delete-node/ ethernet-phy@3;
  44. };
  45. ess-psgmii@98000 {
  46. status = "okay";
  47. };
  48. tcsr@1949000 {
  49. compatible = "qcom,tcsr";
  50. reg = <0x1949000 0x100>;
  51. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  52. };
  53. tcsr@194b000 {
  54. compatible = "qcom,tcsr";
  55. reg = <0x194b000 0x100>;
  56. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  57. };
  58. ess_tcsr@1953000 {
  59. compatible = "qcom,tcsr";
  60. reg = <0x1953000 0x1000>;
  61. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  62. };
  63. tcsr@1957000 {
  64. compatible = "qcom,tcsr";
  65. reg = <0x1957000 0x100>;
  66. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  67. };
  68. usb2@60f8800 {
  69. status = "okay";
  70. };
  71. usb3@8af8800 {
  72. status = "okay";
  73. };
  74. crypto@8e3a000 {
  75. status = "okay";
  76. };
  77. watchdog@b017000 {
  78. status = "okay";
  79. };
  80. ess-switch@c000000 {
  81. status = "okay";
  82. switch_lan_bmp = <0x1e>;
  83. switch_wan_bmp = <0x20>;
  84. };
  85. edma@c080000 {
  86. status = "okay";
  87. };
  88. };
  89. };
  90. &blsp_dma {
  91. status = "okay";
  92. };
  93. &blsp1_spi1 {
  94. status = "okay";
  95. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
  96. <&tlmm 59 GPIO_ACTIVE_HIGH>;
  97. pinctrl-0 = <&spi0_pins>;
  98. pinctrl-names = "default";
  99. flash@0 {
  100. compatible = "jedec,spi-nor";
  101. reg = <0>;
  102. spi-max-frequency = <24000000>;
  103. partitions {
  104. compatible = "fixed-partitions";
  105. #address-cells = <1>;
  106. #size-cells = <1>;
  107. partition@0 {
  108. label = "0:SBL1";
  109. reg = <0x000000 0x040000>;
  110. read-only;
  111. };
  112. partition@40000 {
  113. label = "0:MIBIB";
  114. reg = <0x040000 0x020000>;
  115. read-only;
  116. };
  117. partition@60000 {
  118. label = "0:QSEE";
  119. reg = <0x060000 0x060000>;
  120. read-only;
  121. };
  122. partition@c0000 {
  123. label = "0:CDT";
  124. reg = <0x0c0000 0x010000>;
  125. read-only;
  126. };
  127. partition@d0000 {
  128. label = "0:DDRPARAMS";
  129. reg = <0x0d0000 0x010000>;
  130. read-only;
  131. };
  132. partition@e0000 {
  133. label = "0:APPSBLENV";
  134. reg = <0x0e0000 0x010000>;
  135. };
  136. partition@f0000 {
  137. label = "0:APPSBL";
  138. reg = <0x0f0000 0x080000>;
  139. read-only;
  140. };
  141. partition@170000 {
  142. label = "0:ART";
  143. reg = <0x170000 0x010000>;
  144. read-only;
  145. };
  146. };
  147. };
  148. flash@1 {
  149. status = "okay";
  150. compatible = "spi-nand";
  151. reg = <1>;
  152. spi-max-frequency = <24000000>;
  153. partitions {
  154. compatible = "fixed-partitions";
  155. #address-cells = <1>;
  156. #size-cells = <1>;
  157. partition@0 {
  158. label = "ubi";
  159. reg = <0x0000000 0x8000000>;
  160. };
  161. };
  162. };
  163. };
  164. &blsp1_uart1 {
  165. status = "okay";
  166. pinctrl-0 = <&serial0_pins>;
  167. pinctrl-names = "default";
  168. };
  169. &cryptobam {
  170. status = "okay";
  171. };
  172. &gmac0 {
  173. qcom,phy_mdio_addr = <2>;
  174. qcom,poll_required = <1>;
  175. };
  176. &gmac1 {
  177. qcom,phy_mdio_addr = <4>;
  178. qcom,poll_required = <1>;
  179. };
  180. &tlmm {
  181. serial0_pins: serial0_pinmux {
  182. mux {
  183. function = "blsp_uart0";
  184. pins = "gpio60", "gpio61";
  185. bias-disable;
  186. };
  187. };
  188. spi0_pins: spi0_pinmux {
  189. mux {
  190. function = "blsp_spi0";
  191. pins = "gpio55", "gpio56", "gpio57";
  192. bias-disable;
  193. drive-strength = <12>;
  194. };
  195. mux_cs {
  196. function = "gpio";
  197. pins = "gpio54", "gpio59";
  198. bias-disable;
  199. drive-strength = <2>;
  200. output-high;
  201. };
  202. };
  203. };
  204. &usb2_hs_phy {
  205. status = "okay";
  206. };
  207. &usb3_hs_phy {
  208. status = "okay";
  209. };
  210. &usb3_ss_phy {
  211. status = "okay";
  212. };
  213. &wifi0 {
  214. status = "okay";
  215. qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
  216. };
  217. &wifi1 {
  218. status = "okay";
  219. qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
  220. };