qcom-ipq4029-gl-s1300.dts 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "GL.iNet GL-S1300";
  8. compatible = "glinet,gl-s1300";
  9. aliases {
  10. led-boot = &led_power;
  11. led-failsafe = &led_power;
  12. led-running = &led_power;
  13. led-upgrade = &led_power;
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = <0x80000000 0x10000000>;
  18. };
  19. soc {
  20. rng@22000 {
  21. status = "okay";
  22. };
  23. mdio@90000 {
  24. status = "okay";
  25. };
  26. ess-psgmii@98000 {
  27. status = "okay";
  28. };
  29. tcsr@1949000 {
  30. compatible = "qcom,tcsr";
  31. reg = <0x1949000 0x100>;
  32. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  33. };
  34. tcsr@194b000 {
  35. /* select hostmode */
  36. compatible = "qcom,tcsr";
  37. reg = <0x194b000 0x100>;
  38. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  39. status = "okay";
  40. };
  41. ess_tcsr@1953000 {
  42. compatible = "qcom,tcsr";
  43. reg = <0x1953000 0x1000>;
  44. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  45. };
  46. tcsr@1957000 {
  47. compatible = "qcom,tcsr";
  48. reg = <0x1957000 0x100>;
  49. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  50. };
  51. usb2@60f8800 {
  52. status = "okay";
  53. };
  54. usb3@8af8800 {
  55. status = "okay";
  56. };
  57. crypto@8e3a000 {
  58. status = "okay";
  59. };
  60. watchdog@b017000 {
  61. status = "okay";
  62. };
  63. ess-switch@c000000 {
  64. status = "okay";
  65. switch_lan_bmp = <0x18>;
  66. switch_wan_bmp = <0x20>;
  67. };
  68. edma@c080000 {
  69. status = "okay";
  70. };
  71. };
  72. keys {
  73. compatible = "gpio-keys";
  74. wps {
  75. label = "wps";
  76. gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
  77. linux,code = <KEY_WPS_BUTTON>;
  78. };
  79. reset {
  80. label = "reset";
  81. gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  82. linux,code = <KEY_RESTART>;
  83. };
  84. };
  85. leds {
  86. compatible = "gpio-leds";
  87. led_power: power {
  88. label = "green:power";
  89. gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  90. default-state = "on";
  91. };
  92. mesh {
  93. label = "green:mesh";
  94. gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
  95. };
  96. wlan {
  97. label = "green:wlan";
  98. gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
  99. linux,default-trigger = "phy0tpt";
  100. };
  101. };
  102. };
  103. &vqmmc {
  104. status = "okay";
  105. };
  106. &sdhci {
  107. status = "okay";
  108. pinctrl-0 = <&sd_pins>;
  109. pinctrl-names = "default";
  110. cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
  111. vqmmc-supply = <&vqmmc>;
  112. };
  113. &blsp_dma {
  114. status = "okay";
  115. };
  116. &cryptobam {
  117. status = "okay";
  118. };
  119. &blsp1_spi1 {
  120. pinctrl-0 = <&spi_0_pins>;
  121. pinctrl-names = "default";
  122. status = "okay";
  123. cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  124. flash@0 {
  125. compatible = "jedec,spi-nor";
  126. reg = <0>;
  127. spi-max-frequency = <24000000>;
  128. partitions {
  129. compatible = "fixed-partitions";
  130. #address-cells = <1>;
  131. #size-cells = <1>;
  132. SBL1@0 {
  133. label = "SBL1";
  134. reg = <0x0 0x40000>;
  135. read-only;
  136. };
  137. MIBIB@40000 {
  138. label = "MIBIB";
  139. reg = <0x40000 0x20000>;
  140. read-only;
  141. };
  142. QSEE@60000 {
  143. label = "QSEE";
  144. reg = <0x60000 0x60000>;
  145. read-only;
  146. };
  147. CDT@c0000 {
  148. label = "CDT";
  149. reg = <0xc0000 0x10000>;
  150. read-only;
  151. };
  152. DDRPARAMS@d0000 {
  153. label = "DDRPARAMS";
  154. reg = <0xd0000 0x10000>;
  155. read-only;
  156. };
  157. APPSBLENV@e0000 {
  158. label = "APPSBLENV";
  159. reg = <0xe0000 0x10000>;
  160. read-only;
  161. };
  162. APPSBL@f0000 {
  163. label = "APPSBL";
  164. reg = <0xf0000 0x80000>;
  165. read-only;
  166. };
  167. ART@170000 {
  168. label = "ART";
  169. reg = <0x170000 0x10000>;
  170. read-only;
  171. };
  172. firmware@180000 {
  173. compatible = "denx,fit";
  174. label = "firmware";
  175. reg = <0x180000 0xe80000>;
  176. };
  177. };
  178. };
  179. };
  180. &blsp1_spi2 {
  181. pinctrl-0 = <&spi_1_pins>;
  182. pinctrl-names = "default";
  183. status = "okay";
  184. spidev1: spi@0 {
  185. compatible = "siliconlabs,si3210";
  186. reg = <0>;
  187. spi-max-frequency = <24000000>;
  188. };
  189. };
  190. &blsp1_uart1 {
  191. pinctrl-0 = <&serial_pins>;
  192. pinctrl-names = "default";
  193. status = "okay";
  194. };
  195. &blsp1_uart2 {
  196. pinctrl-0 = <&serial_1_pins>;
  197. pinctrl-names = "default";
  198. status = "okay";
  199. };
  200. &tlmm {
  201. serial_pins: serial_pinmux {
  202. mux {
  203. pins = "gpio16", "gpio17";
  204. function = "blsp_uart0";
  205. bias-disable;
  206. };
  207. };
  208. serial_1_pins: serial1_pinmux {
  209. mux {
  210. pins = "gpio8", "gpio9",
  211. "gpio10", "gpio11";
  212. function = "blsp_uart1";
  213. bias-disable;
  214. };
  215. };
  216. spi_0_pins: spi_0_pinmux {
  217. pinmux {
  218. function = "blsp_spi0";
  219. pins = "gpio13", "gpio14", "gpio15";
  220. };
  221. pinmux_cs {
  222. function = "gpio";
  223. pins = "gpio12";
  224. };
  225. pinconf {
  226. pins = "gpio13", "gpio14", "gpio15";
  227. drive-strength = <12>;
  228. bias-disable;
  229. };
  230. pinconf_cs {
  231. pins = "gpio12";
  232. drive-strength = <2>;
  233. bias-disable;
  234. output-high;
  235. };
  236. };
  237. spi_1_pins: spi_1_pinmux {
  238. mux {
  239. pins = "gpio44", "gpio46", "gpio47";
  240. function = "blsp_spi1";
  241. bias-disable;
  242. };
  243. host_int {
  244. pins = "gpio42";
  245. function = "gpio";
  246. input;
  247. };
  248. cs {
  249. pins = "gpio45";
  250. function = "gpio";
  251. bias-pull-up;
  252. };
  253. wake {
  254. pins = "gpio40";
  255. function = "gpio";
  256. output-high;
  257. };
  258. reset {
  259. pins = "gpio49";
  260. function = "gpio";
  261. output-high;
  262. };
  263. };
  264. sd_pins: sd_pins {
  265. pinmux {
  266. function = "sdio";
  267. pins = "gpio23", "gpio24", "gpio25", "gpio26",
  268. "gpio28", "gpio29", "gpio30", "gpio31";
  269. drive-strength = <10>;
  270. };
  271. pinmux_sd_clk {
  272. function = "sdio";
  273. pins = "gpio27";
  274. drive-strength = <16>;
  275. };
  276. pinmux_sd7 {
  277. function = "sdio";
  278. pins = "gpio32";
  279. drive-strength = <10>;
  280. bias-disable;
  281. };
  282. };
  283. };
  284. &usb2_hs_phy {
  285. status = "okay";
  286. };
  287. &usb3_hs_phy {
  288. status = "okay";
  289. };
  290. &usb3_ss_phy {
  291. status = "okay";
  292. };
  293. &wifi0 {
  294. status = "okay";
  295. qcom,ath10k-calibration-variant = "GL-S1300";
  296. };
  297. &wifi1 {
  298. status = "okay";
  299. qcom,ath10k-calibration-variant = "GL-S1300";
  300. };