GL-MT750.dts 2.2 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "glinet,gl-mt750", "ralink,mt7620a-soc";
  7. model = "GL-MT750";
  8. chosen {
  9. bootargs = "console=ttyS0,115200";
  10. };
  11. gpio-leds {
  12. compatible = "gpio-leds";
  13. wan {
  14. label = "gl-mt750:wan";
  15. gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  16. };
  17. lan {
  18. label = "gl-mt750:lan";
  19. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  20. };
  21. wlan {
  22. label = "gl-mt750:wlan";
  23. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  24. };
  25. };
  26. gpio-keys-polled {
  27. compatible = "gpio-keys-polled";
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. poll-interval = <20>;
  31. reset {
  32. label = "reset";
  33. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  34. linux,code = <KEY_RESTART>;
  35. };
  36. BTN_0 {
  37. label = "BTN_0";
  38. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  39. linux,code = <BTN_0>;
  40. };
  41. BTN_1 {
  42. label = "BTN_1";
  43. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  44. linux,code = <BTN_1>;
  45. };
  46. };
  47. };
  48. &gpio0 {
  49. status = "okay";
  50. };
  51. &gpio1 {
  52. status = "okay";
  53. };
  54. &gpio2 {
  55. status = "okay";
  56. };
  57. &gpio3 {
  58. status = "okay";
  59. };
  60. &spi0 {
  61. status = "okay";
  62. m25p80@0 {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. compatible = "jedec,spi-nor";
  66. reg = <0>;
  67. spi-max-frequency = <10000000>;
  68. partition@0 {
  69. label = "u-boot";
  70. reg = <0x0 0x30000>;
  71. };
  72. partition@30000 {
  73. label = "u-boot-env";
  74. reg = <0x30000 0x10000>;
  75. read-only;
  76. };
  77. factory: partition@40000 {
  78. label = "factory";
  79. reg = <0x40000 0x10000>;
  80. read-only;
  81. };
  82. partition@50000 {
  83. label = "firmware";
  84. reg = <0x50000 0xf80000>;
  85. };
  86. partition@ff0000 {
  87. label = "art";
  88. reg = <0xff0000 0x10000>;
  89. };
  90. };
  91. };
  92. &sdhci {
  93. status = "okay";
  94. };
  95. &ehci {
  96. status = "okay";
  97. };
  98. &ohci {
  99. status = "okay";
  100. };
  101. &ethernet {
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&ephy_pins>;
  104. mtd-mac-address = <&factory 0x4000>;
  105. mediatek,portmap = "llllw";
  106. };
  107. &wmac {
  108. ralink,mtd-eeprom = <&factory 0>;
  109. };
  110. &pcie {
  111. status = "okay";
  112. pcie-bridge {
  113. mt76@0,0 {
  114. reg = <0x0000 0 0 0 0>;
  115. device_type = "pci";
  116. mediatek,mtd-eeprom = <&factory 0x8000>;
  117. };
  118. };
  119. };
  120. &pinctrl {
  121. state_default: pinctrl0 {
  122. gpio {
  123. ralink,group = "wled","ephy","uartf";
  124. ralink,function = "gpio";
  125. };
  126. };
  127. };