036-v5.1-0002-ARM-dts-BCM5301X-Add-basic-DT-for-Phicomm-K3.patch 2.6 KB

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  1. From 40a17923367118e32e5e413a952736dd83635b32 Mon Sep 17 00:00:00 2001
  2. From: Hao Dong <[email protected]>
  3. Date: Sun, 20 Jan 2019 23:33:27 +0100
  4. Subject: [PATCH] ARM: dts: BCM5301X: Add basic DT for Phicomm K3
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI),
  9. 512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are
  10. BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by
  11. a PIC microcontroller, which is in turn wired to UART1 of main board.
  12. Signed-off-by: Hao Dong <[email protected]>
  13. [rmilecki: drop chosen { }, fix whitespaces, update commit message]
  14. Signed-off-by: Rafał Miłecki <[email protected]>
  15. Signed-off-by: Florian Fainelli <[email protected]>
  16. ---
  17. arch/arm/boot/dts/Makefile | 1 +
  18. arch/arm/boot/dts/bcm47094-phicomm-k3.dts | 71 +++++++++++++++++++++++
  19. 2 files changed, 72 insertions(+)
  20. create mode 100644 arch/arm/boot/dts/bcm47094-phicomm-k3.dts
  21. --- a/arch/arm/boot/dts/Makefile
  22. +++ b/arch/arm/boot/dts/Makefile
  23. @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
  24. bcm47094-luxul-xwr-3100.dtb \
  25. bcm47094-luxul-xwr-3150-v1.dtb \
  26. bcm47094-netgear-r8500.dtb \
  27. + bcm47094-phicomm-k3.dtb \
  28. bcm94708.dtb \
  29. bcm94709.dtb \
  30. bcm953012er.dtb \
  31. --- /dev/null
  32. +++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
  33. @@ -0,0 +1,71 @@
  34. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  35. +/*
  36. + * Copyright (C) 2017 Hamster Tian <[email protected]>
  37. + * Copyright (C) 2019 Hao Dong <[email protected]>
  38. + */
  39. +
  40. +/dts-v1/;
  41. +
  42. +#include "bcm47094.dtsi"
  43. +#include "bcm5301x-nand-cs0-bch4.dtsi"
  44. +
  45. +/ {
  46. + compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708";
  47. + model = "Phicomm K3";
  48. +
  49. + memory {
  50. + reg = <0x00000000 0x08000000
  51. + 0x88000000 0x18000000>;
  52. + };
  53. +
  54. + gpio-keys {
  55. + compatible = "gpio-keys";
  56. + #address-cells = <1>;
  57. + #size-cells = <0>;
  58. +
  59. + restart {
  60. + label = "Reset";
  61. + linux,code = <KEY_RESTART>;
  62. + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
  63. + };
  64. + };
  65. +};
  66. +
  67. +&uart1 {
  68. + status = "okay";
  69. +};
  70. +
  71. +&usb3_phy {
  72. + status = "okay";
  73. +};
  74. +
  75. +&nandcs {
  76. + partitions {
  77. + compatible = "fixed-partitions";
  78. + #address-cells = <1>;
  79. + #size-cells = <1>;
  80. +
  81. + partition@0 {
  82. + label = "boot";
  83. + reg = <0x0000000 0x0080000>;
  84. + read-only;
  85. + };
  86. +
  87. + partition@80000 {
  88. + label = "nvram";
  89. + reg = <0x0080000 0x0100000>;
  90. + };
  91. +
  92. + partition@180000{
  93. + label = "phicomm";
  94. + reg = <0x0180000 0x0280000>;
  95. + read-only;
  96. + };
  97. +
  98. + partition@400000 {
  99. + label = "firmware";
  100. + reg = <0x0400000 0x7C00000>;
  101. + compatible = "brcm,trx";
  102. + };
  103. + };
  104. +};