123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081 |
- // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
- #include "rtl838x.dtsi"
- #include "rtl83xx_d-link_dgs-1210_common.dtsi"
- / {
- compatible = "d-link,dgs-1210-16", "realtek,rtl838x-soc";
- model = "D-Link DGS-1210-16";
- };
- ðernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <ðernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
- EXTERNAL_SFP_PHY(24)
- EXTERNAL_SFP_PHY(25)
- EXTERNAL_SFP_PHY(26)
- EXTERNAL_SFP_PHY(27)
- };
- };
- &switch0 {
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
- SWITCH_PORT(8, 9, internal)
- SWITCH_PORT(9, 10, internal)
- SWITCH_PORT(10, 11, internal)
- SWITCH_PORT(11, 12, internal)
- SWITCH_PORT(12, 13, internal)
- SWITCH_PORT(13, 14, internal)
- SWITCH_PORT(14, 15, internal)
- SWITCH_PORT(15, 16, internal)
- SWITCH_PORT(24, 17, qsgmii)
- SWITCH_PORT(25, 18, qsgmii)
- SWITCH_PORT(26, 19, qsgmii)
- SWITCH_PORT(27, 20, qsgmii)
- port@28 {
- ethernet = <ðernet0>;
- reg = <28>;
- phy-mode = "internal";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
|