rtl8382_d-link_dgs-1210-16.dts 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "rtl838x.dtsi"
  3. #include "rtl83xx_d-link_dgs-1210_common.dtsi"
  4. / {
  5. compatible = "d-link,dgs-1210-16", "realtek,rtl838x-soc";
  6. model = "D-Link DGS-1210-16";
  7. };
  8. &ethernet0 {
  9. mdio: mdio-bus {
  10. compatible = "realtek,rtl838x-mdio";
  11. regmap = <&ethernet0>;
  12. #address-cells = <1>;
  13. #size-cells = <0>;
  14. EXTERNAL_PHY(0)
  15. EXTERNAL_PHY(1)
  16. EXTERNAL_PHY(2)
  17. EXTERNAL_PHY(3)
  18. EXTERNAL_PHY(4)
  19. EXTERNAL_PHY(5)
  20. EXTERNAL_PHY(6)
  21. EXTERNAL_PHY(7)
  22. INTERNAL_PHY(8)
  23. INTERNAL_PHY(9)
  24. INTERNAL_PHY(10)
  25. INTERNAL_PHY(11)
  26. INTERNAL_PHY(12)
  27. INTERNAL_PHY(13)
  28. INTERNAL_PHY(14)
  29. INTERNAL_PHY(15)
  30. EXTERNAL_SFP_PHY(24)
  31. EXTERNAL_SFP_PHY(25)
  32. EXTERNAL_SFP_PHY(26)
  33. EXTERNAL_SFP_PHY(27)
  34. };
  35. };
  36. &switch0 {
  37. ports {
  38. #address-cells = <1>;
  39. #size-cells = <0>;
  40. SWITCH_PORT(0, 1, qsgmii)
  41. SWITCH_PORT(1, 2, qsgmii)
  42. SWITCH_PORT(2, 3, qsgmii)
  43. SWITCH_PORT(3, 4, qsgmii)
  44. SWITCH_PORT(4, 5, qsgmii)
  45. SWITCH_PORT(5, 6, qsgmii)
  46. SWITCH_PORT(6, 7, qsgmii)
  47. SWITCH_PORT(7, 8, qsgmii)
  48. SWITCH_PORT(8, 9, internal)
  49. SWITCH_PORT(9, 10, internal)
  50. SWITCH_PORT(10, 11, internal)
  51. SWITCH_PORT(11, 12, internal)
  52. SWITCH_PORT(12, 13, internal)
  53. SWITCH_PORT(13, 14, internal)
  54. SWITCH_PORT(14, 15, internal)
  55. SWITCH_PORT(15, 16, internal)
  56. SWITCH_PORT(24, 17, qsgmii)
  57. SWITCH_PORT(25, 18, qsgmii)
  58. SWITCH_PORT(26, 19, qsgmii)
  59. SWITCH_PORT(27, 20, qsgmii)
  60. port@28 {
  61. ethernet = <&ethernet0>;
  62. reg = <28>;
  63. phy-mode = "internal";
  64. fixed-link {
  65. speed = <1000>;
  66. full-duplex;
  67. };
  68. };
  69. };
  70. };