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gpio-rtl8231.c 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #include <linux/gpio/driver.h>
  3. #include <linux/module.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/delay.h>
  6. #include <asm/mach-rtl838x/mach-rtl83xx.h>
  7. /* RTL8231 registers for LED control */
  8. #define RTL8231_LED_FUNC0 0x0000
  9. #define RTL8231_LED_FUNC1 0x0001
  10. #define RTL8231_READY_MASK 0x03f0
  11. #define RTL8231_READY_VALUE 0x0370
  12. #define RTL8231_GPIO_PIN_SEL(gpio) ((0x0002) + ((gpio) >> 4))
  13. #define RTL8231_GPIO_DIR(gpio) ((0x0005) + ((gpio) >> 4))
  14. #define RTL8231_GPIO_DATA(gpio) ((0x001C) + ((gpio) >> 4))
  15. #define USEC_TIMEOUT 5000
  16. #define RTL8231_SMI_BUS_ID_MAX 0x1F
  17. struct rtl8231_gpios {
  18. struct gpio_chip gc;
  19. struct device *dev;
  20. u32 id;
  21. u32 smi_bus_id;
  22. u16 reg_shadow[0x20];
  23. u32 reg_cached;
  24. int ext_gpio_indrt_access;
  25. };
  26. extern struct rtl83xx_soc_info soc_info;
  27. DEFINE_MUTEX(miim_lock);
  28. static u32 rtl8231_read(struct rtl8231_gpios *gpios, u32 reg)
  29. {
  30. u32 t = 0, n = 0;
  31. reg &= 0x1f;
  32. /* Calculate read register address */
  33. t = (gpios->smi_bus_id << 2) | (reg << 7);
  34. /* Set execution bit: cleared when operation completed */
  35. t |= 1;
  36. // Start execution
  37. sw_w32(t, gpios->ext_gpio_indrt_access);
  38. do {
  39. udelay(1);
  40. t = sw_r32(gpios->ext_gpio_indrt_access);
  41. n++;
  42. } while ((t & 1) && (n < USEC_TIMEOUT));
  43. if (n >= USEC_TIMEOUT)
  44. return 0x80000000;
  45. pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id,
  46. reg, (t & 0xffff0000) >> 16);
  47. return (t & 0xffff0000) >> 16;
  48. }
  49. static int rtl8231_write(struct rtl8231_gpios *gpios, u32 reg, u32 data)
  50. {
  51. u32 t = 0, n = 0;
  52. pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id, reg, data);
  53. reg &= 0x1f;
  54. t = (gpios->smi_bus_id << 2) | (reg << 7) | (data << 16);
  55. /* Set write bit */
  56. t |= 2;
  57. /* Set execution bit: cleared when operation completed */
  58. t |= 1;
  59. // Start execution
  60. sw_w32(t, gpios->ext_gpio_indrt_access);
  61. do {
  62. udelay(1);
  63. t = sw_r32(gpios->ext_gpio_indrt_access);
  64. } while ((t & 1) && (n < USEC_TIMEOUT));
  65. if (n >= USEC_TIMEOUT)
  66. return -1;
  67. return 0;
  68. }
  69. static u32 rtl8231_read_cached(struct rtl8231_gpios *gpios, u32 reg)
  70. {
  71. if (reg > 0x1f)
  72. return 0;
  73. if (gpios->reg_cached & (1 << reg))
  74. return gpios->reg_shadow[reg];
  75. return rtl8231_read(gpios, reg);
  76. }
  77. /* Set Direction of the RTL8231 pin:
  78. * dir 1: input
  79. * dir 0: output
  80. */
  81. static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir)
  82. {
  83. u32 v;
  84. int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio);
  85. int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
  86. int dpin = gpio % 16;
  87. if (gpio > 31) {
  88. pr_debug("WARNING: HIGH pin\n");
  89. dpin += 5;
  90. pin_dir_addr = pin_sel_addr;
  91. }
  92. v = rtl8231_read_cached(gpios, pin_dir_addr);
  93. if (v & 0x80000000) {
  94. pr_err("Error reading RTL8231\n");
  95. return -1;
  96. }
  97. v = (v & ~(1 << dpin)) | (dir << dpin);
  98. rtl8231_write(gpios, pin_dir_addr, v);
  99. gpios->reg_shadow[pin_dir_addr] = v;
  100. gpios->reg_cached |= 1 << pin_dir_addr;
  101. return 0;
  102. }
  103. static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir)
  104. {
  105. /* dir 1: input
  106. * dir 0: output
  107. */
  108. u32 v;
  109. int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
  110. int pin = gpio % 16;
  111. if (gpio > 31) {
  112. pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio);
  113. pin += 5;
  114. }
  115. v = rtl8231_read(gpios, pin_dir_addr);
  116. if (v & (1 << pin))
  117. *dir = 1;
  118. else
  119. *dir = 0;
  120. return 0;
  121. }
  122. static int rtl8231_pin_set(struct rtl8231_gpios *gpios, u32 gpio, u32 data)
  123. {
  124. u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
  125. pr_debug("%s: %d to %d\n", __func__, gpio, data);
  126. if (v & 0x80000000) {
  127. pr_err("Error reading RTL8231\n");
  128. return -1;
  129. }
  130. v = (v & ~(1 << (gpio % 16))) | (data << (gpio % 16));
  131. rtl8231_write(gpios, RTL8231_GPIO_DATA(gpio), v);
  132. gpios->reg_shadow[RTL8231_GPIO_DATA(gpio)] = v;
  133. gpios->reg_cached |= 1 << RTL8231_GPIO_DATA(gpio);
  134. return 0;
  135. }
  136. static int rtl8231_pin_get(struct rtl8231_gpios *gpios, u32 gpio, u16 *state)
  137. {
  138. u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
  139. if (v & 0x80000000) {
  140. pr_err("Error reading RTL8231\n");
  141. return -1;
  142. }
  143. *state = v & 0xffff;
  144. return 0;
  145. }
  146. static int rtl8231_direction_input(struct gpio_chip *gc, unsigned int offset)
  147. {
  148. int err;
  149. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  150. pr_debug("%s: %d\n", __func__, offset);
  151. mutex_lock(&miim_lock);
  152. err = rtl8231_pin_dir(gpios, offset, 1);
  153. mutex_unlock(&miim_lock);
  154. return err;
  155. }
  156. static int rtl8231_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
  157. {
  158. int err;
  159. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  160. pr_debug("%s: %d\n", __func__, offset);
  161. mutex_lock(&miim_lock);
  162. err = rtl8231_pin_dir(gpios, offset, 0);
  163. mutex_unlock(&miim_lock);
  164. if (!err)
  165. err = rtl8231_pin_set(gpios, offset, value);
  166. return err;
  167. }
  168. static int rtl8231_get_direction(struct gpio_chip *gc, unsigned int offset)
  169. {
  170. u32 v = 0;
  171. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  172. pr_debug("%s: %d\n", __func__, offset);
  173. mutex_lock(&miim_lock);
  174. rtl8231_pin_dir_get(gpios, offset, &v);
  175. mutex_unlock(&miim_lock);
  176. return v;
  177. }
  178. static int rtl8231_gpio_get(struct gpio_chip *gc, unsigned int offset)
  179. {
  180. u16 state = 0;
  181. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  182. mutex_lock(&miim_lock);
  183. rtl8231_pin_get(gpios, offset, &state);
  184. mutex_unlock(&miim_lock);
  185. if (state & (1 << (offset % 16)))
  186. return 1;
  187. return 0;
  188. }
  189. void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
  190. {
  191. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  192. rtl8231_pin_set(gpios, offset, value);
  193. }
  194. int rtl8231_init(struct rtl8231_gpios *gpios)
  195. {
  196. u32 ret;
  197. pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id);
  198. gpios->reg_cached = 0;
  199. if (soc_info.family == RTL8390_FAMILY_ID) {
  200. // RTL8390: Enable external gpio in global led control register
  201. sw_w32_mask(0x7 << 18, 0x4 << 18, RTL839X_LED_GLB_CTRL);
  202. } else if (soc_info.family == RTL8380_FAMILY_ID) {
  203. // RTL8380: Enable RTL8231 indirect access mode
  204. sw_w32_mask(0, 1, RTL838X_EXTRA_GPIO_CTRL);
  205. sw_w32_mask(3, 1, RTL838X_DMY_REG5);
  206. }
  207. ret = rtl8231_read(gpios, RTL8231_LED_FUNC1);
  208. if ((ret & 0x80000000) || ((ret & RTL8231_READY_MASK) != RTL8231_READY_VALUE))
  209. return -ENXIO;
  210. /* Select GPIO functionality and force input direction for pins 0-36 */
  211. rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff);
  212. rtl8231_write(gpios, RTL8231_GPIO_DIR(0), 0xffff);
  213. rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff);
  214. rtl8231_write(gpios, RTL8231_GPIO_DIR(16), 0xffff);
  215. rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), 0x03ff);
  216. /* Set LED_Start to enable drivers for output mode */
  217. rtl8231_write(gpios, RTL8231_LED_FUNC0, 1 << 1);
  218. return 0;
  219. }
  220. static const struct of_device_id rtl8231_gpio_of_match[] = {
  221. { .compatible = "realtek,rtl8231-gpio" },
  222. {},
  223. };
  224. MODULE_DEVICE_TABLE(of, rtl8231_gpio_of_match);
  225. static int rtl8231_gpio_probe(struct platform_device *pdev)
  226. {
  227. struct device *dev = &pdev->dev;
  228. struct device_node *np = dev->of_node;
  229. struct rtl8231_gpios *gpios;
  230. int err;
  231. pr_info("Probing RTL8231 GPIOs\n");
  232. if (!np) {
  233. dev_err(&pdev->dev, "No DT found\n");
  234. return -EINVAL;
  235. }
  236. gpios = devm_kzalloc(dev, sizeof(*gpios), GFP_KERNEL);
  237. if (!gpios)
  238. return -ENOMEM;
  239. gpios->id = soc_info.id;
  240. if (soc_info.family == RTL8380_FAMILY_ID) {
  241. gpios->ext_gpio_indrt_access = RTL838X_EXT_GPIO_INDRT_ACCESS;
  242. }
  243. if (soc_info.family == RTL8390_FAMILY_ID) {
  244. gpios->ext_gpio_indrt_access = RTL839X_EXT_GPIO_INDRT_ACCESS;
  245. }
  246. err = of_property_read_u32(np, "indirect-access-bus-id", &gpios->smi_bus_id);
  247. if (!err && gpios->smi_bus_id > RTL8231_SMI_BUS_ID_MAX)
  248. err = -EINVAL;
  249. if (err) {
  250. dev_err(dev, "invalid or missing indirect-access-bus-id\n");
  251. return err;
  252. }
  253. err = rtl8231_init(gpios);
  254. if (err) {
  255. dev_err(dev, "no device found at bus address %d\n", gpios->smi_bus_id);
  256. return err;
  257. }
  258. gpios->dev = dev;
  259. gpios->gc.base = -1;
  260. gpios->gc.ngpio = 37;
  261. gpios->gc.label = "rtl8231";
  262. gpios->gc.parent = dev;
  263. gpios->gc.owner = THIS_MODULE;
  264. gpios->gc.can_sleep = true;
  265. gpios->gc.direction_input = rtl8231_direction_input;
  266. gpios->gc.direction_output = rtl8231_direction_output;
  267. gpios->gc.set = rtl8231_gpio_set;
  268. gpios->gc.get = rtl8231_gpio_get;
  269. gpios->gc.get_direction = rtl8231_get_direction;
  270. err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
  271. return err;
  272. }
  273. static struct platform_driver rtl8231_gpio_driver = {
  274. .driver = {
  275. .name = "rtl8231-gpio",
  276. .of_match_table = rtl8231_gpio_of_match,
  277. },
  278. .probe = rtl8231_gpio_probe,
  279. };
  280. module_platform_driver(rtl8231_gpio_driver);
  281. MODULE_DESCRIPTION("Realtek RTL8231 GPIO expansion chip support");
  282. MODULE_LICENSE("GPL v2");