034-v6.1-0005-arm64-dts-Move-BCM4908-dts-to-bcmbca-folder.patch 49 KB

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  1. From ded8f22945899f4e87dd6d952bbc4abce6e64b7e Mon Sep 17 00:00:00 2001
  2. From: William Zhang <[email protected]>
  3. Date: Wed, 3 Aug 2022 10:54:50 -0700
  4. Subject: [PATCH] arm64: dts: Move BCM4908 dts to bcmbca folder
  5. As part of ARCH_BCM4908 to ARCH_BCMBCA migration, move the BCM4908 dts
  6. files to bcmbca folder and use CONFIG_ARCH_BCMBCA to build all the
  7. BCM4908 board dts. Delete bcm4908 folder and its makefile as well.
  8. Signed-off-by: William Zhang <[email protected]>
  9. Link: https://lore.kernel.org/r/[email protected]
  10. Signed-off-by: Florian Fainelli <[email protected]>
  11. ---
  12. arch/arm64/boot/dts/broadcom/Makefile | 1 -
  13. arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 5 -----
  14. arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 4 ++++
  15. .../broadcom/{bcm4908 => bcmbca}/bcm4906-netgear-r8000p.dts | 0
  16. .../{bcm4908 => bcmbca}/bcm4906-tplink-archer-c2300-v1.dts | 0
  17. .../arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906.dtsi | 0
  18. .../broadcom/{bcm4908 => bcmbca}/bcm4908-asus-gt-ac5300.dts | 0
  19. .../broadcom/{bcm4908 => bcmbca}/bcm4908-netgear-raxe500.dts | 0
  20. .../arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908.dtsi | 0
  21. 9 files changed, 4 insertions(+), 6 deletions(-)
  22. delete mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/Makefile
  23. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906-netgear-r8000p.dts (100%)
  24. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906-tplink-archer-c2300-v1.dts (100%)
  25. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4906.dtsi (100%)
  26. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908-asus-gt-ac5300.dts (100%)
  27. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908-netgear-raxe500.dts (100%)
  28. rename arch/arm64/boot/dts/broadcom/{bcm4908 => bcmbca}/bcm4908.dtsi (100%)
  29. --- a/arch/arm64/boot/dts/broadcom/Makefile
  30. +++ b/arch/arm64/boot/dts/broadcom/Makefile
  31. @@ -6,7 +6,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
  32. bcm2837-rpi-3-b-plus.dtb \
  33. bcm2837-rpi-cm3-io3.dtb
  34. -subdir-y += bcm4908
  35. subdir-y += bcmbca
  36. subdir-y += northstar2
  37. subdir-y += stingray
  38. --- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
  39. +++ /dev/null
  40. @@ -1,5 +0,0 @@
  41. -# SPDX-License-Identifier: GPL-2.0
  42. -dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
  43. -dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb
  44. -dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
  45. -dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb
  46. --- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
  47. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
  48. @@ -1,5 +1,9 @@
  49. # SPDX-License-Identifier: GPL-2.0
  50. dtb-$(CONFIG_ARCH_BCMBCA) += \
  51. + bcm4906-netgear-r8000p.dtb \
  52. + bcm4906-tplink-archer-c2300-v1.dtb \
  53. + bcm4908-asus-gt-ac5300.dtb \
  54. + bcm4908-netgear-raxe500.dtb \
  55. bcm4912-asus-gt-ax6000.dtb \
  56. bcm94912.dtb \
  57. bcm963158.dtb \
  58. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
  59. +++ /dev/null
  60. @@ -1,157 +0,0 @@
  61. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  62. -
  63. -#include <dt-bindings/gpio/gpio.h>
  64. -#include <dt-bindings/input/input.h>
  65. -#include <dt-bindings/leds/common.h>
  66. -
  67. -#include "bcm4906.dtsi"
  68. -
  69. -/ {
  70. - compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";
  71. - model = "Netgear R8000P";
  72. -
  73. - memory@0 {
  74. - device_type = "memory";
  75. - reg = <0x00 0x00 0x00 0x20000000>;
  76. - };
  77. -
  78. - leds {
  79. - compatible = "gpio-leds";
  80. -
  81. - led-power-white {
  82. - function = LED_FUNCTION_POWER;
  83. - color = <LED_COLOR_ID_WHITE>;
  84. - gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  85. - };
  86. -
  87. - led-power-amber {
  88. - function = LED_FUNCTION_POWER;
  89. - color = <LED_COLOR_ID_AMBER>;
  90. - gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  91. - };
  92. -
  93. - led-wps {
  94. - function = LED_FUNCTION_WPS;
  95. - color = <LED_COLOR_ID_WHITE>;
  96. - gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  97. - };
  98. -
  99. - led-2ghz {
  100. - function = "2ghz";
  101. - color = <LED_COLOR_ID_WHITE>;
  102. - gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  103. - };
  104. -
  105. - led-5ghz-1 {
  106. - function = "5ghz-1";
  107. - color = <LED_COLOR_ID_WHITE>;
  108. - gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  109. - };
  110. -
  111. - led-5ghz-2 {
  112. - function = "5ghz-2";
  113. - color = <LED_COLOR_ID_WHITE>;
  114. - gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  115. - };
  116. -
  117. - led-usb2 {
  118. - function = "usb2";
  119. - color = <LED_COLOR_ID_WHITE>;
  120. - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  121. - };
  122. -
  123. - led-usb3 {
  124. - function = "usb3";
  125. - color = <LED_COLOR_ID_WHITE>;
  126. - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  127. - };
  128. -
  129. - led-wifi {
  130. - function = "wifi";
  131. - color = <LED_COLOR_ID_WHITE>;
  132. - gpios = <&gpio0 56 GPIO_ACTIVE_LOW>;
  133. - };
  134. - };
  135. -};
  136. -
  137. -&enet {
  138. - nvmem-cells = <&base_mac_addr>;
  139. - nvmem-cell-names = "mac-address";
  140. -};
  141. -
  142. -&usb_phy {
  143. - brcm,ioc = <1>;
  144. - status = "okay";
  145. -};
  146. -
  147. -&ehci {
  148. - status = "okay";
  149. -};
  150. -
  151. -&ohci {
  152. - status = "okay";
  153. -};
  154. -
  155. -&xhci {
  156. - status = "okay";
  157. -};
  158. -
  159. -&ports {
  160. - port@0 {
  161. - label = "lan4";
  162. - };
  163. -
  164. - port@1 {
  165. - label = "lan3";
  166. - };
  167. -
  168. - port@2 {
  169. - label = "lan2";
  170. - };
  171. -
  172. - port@3 {
  173. - label = "lan1";
  174. - };
  175. -
  176. - port@7 {
  177. - reg = <7>;
  178. - phy-mode = "internal";
  179. - phy-handle = <&phy12>;
  180. - label = "wan";
  181. - };
  182. -};
  183. -
  184. -&nandcs {
  185. - nand-ecc-strength = <4>;
  186. - nand-ecc-step-size = <512>;
  187. - nand-on-flash-bbt;
  188. -
  189. - #address-cells = <1>;
  190. - #size-cells = <0>;
  191. -
  192. - partitions {
  193. - compatible = "fixed-partitions";
  194. - #address-cells = <1>;
  195. - #size-cells = <1>;
  196. -
  197. - partition@0 {
  198. - compatible = "nvmem-cells";
  199. - label = "cferom";
  200. - reg = <0x0 0x100000>;
  201. -
  202. - #address-cells = <1>;
  203. - #size-cells = <1>;
  204. - ranges = <0 0x0 0x100000>;
  205. -
  206. - base_mac_addr: mac@106a0 {
  207. - reg = <0x106a0 0x6>;
  208. - };
  209. - };
  210. -
  211. - partition@100000 {
  212. - compatible = "brcm,bcm4908-firmware";
  213. - label = "firmware";
  214. - reg = <0x100000 0x4400000>;
  215. - };
  216. - };
  217. -};
  218. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
  219. +++ /dev/null
  220. @@ -1,182 +0,0 @@
  221. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  222. -
  223. -#include <dt-bindings/gpio/gpio.h>
  224. -#include <dt-bindings/input/input.h>
  225. -#include <dt-bindings/leds/common.h>
  226. -
  227. -#include "bcm4906.dtsi"
  228. -
  229. -/ {
  230. - compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";
  231. - model = "TP-Link Archer C2300 V1";
  232. -
  233. - memory@0 {
  234. - device_type = "memory";
  235. - reg = <0x00 0x00 0x00 0x20000000>;
  236. - };
  237. -
  238. - leds {
  239. - compatible = "gpio-leds";
  240. -
  241. - led-power {
  242. - function = LED_FUNCTION_POWER;
  243. - color = <LED_COLOR_ID_BLUE>;
  244. - gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  245. - };
  246. -
  247. - led-2ghz {
  248. - function = "2ghz";
  249. - color = <LED_COLOR_ID_BLUE>;
  250. - gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  251. - };
  252. -
  253. - led-5ghz {
  254. - function = "5ghz";
  255. - color = <LED_COLOR_ID_BLUE>;
  256. - gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  257. - };
  258. -
  259. - led-wan-amber {
  260. - function = LED_FUNCTION_WAN;
  261. - color = <LED_COLOR_ID_AMBER>;
  262. - gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  263. - };
  264. -
  265. - led-wan-blue {
  266. - function = LED_FUNCTION_WAN;
  267. - color = <LED_COLOR_ID_BLUE>;
  268. - gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  269. - };
  270. -
  271. - led-lan {
  272. - function = LED_FUNCTION_LAN;
  273. - color = <LED_COLOR_ID_BLUE>;
  274. - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  275. - };
  276. -
  277. - led-wps {
  278. - function = LED_FUNCTION_WPS;
  279. - color = <LED_COLOR_ID_BLUE>;
  280. - gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  281. - };
  282. -
  283. - led-usb2 {
  284. - function = "usb2";
  285. - color = <LED_COLOR_ID_BLUE>;
  286. - gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  287. - };
  288. -
  289. - led-usb3 {
  290. - function = "usbd3";
  291. - color = <LED_COLOR_ID_BLUE>;
  292. - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  293. - };
  294. -
  295. - led-brightness {
  296. - function = LED_FUNCTION_BACKLIGHT;
  297. - color = <LED_COLOR_ID_WHITE>;
  298. - gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  299. - };
  300. - };
  301. -
  302. - gpio-keys-polled {
  303. - compatible = "gpio-keys-polled";
  304. - poll-interval = <100>;
  305. -
  306. - key-brightness {
  307. - label = "LEDs";
  308. - linux,code = <KEY_BRIGHTNESS_ZERO>;
  309. - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  310. - };
  311. -
  312. - key-wps {
  313. - label = "WPS";
  314. - linux,code = <KEY_WPS_BUTTON>;
  315. - gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
  316. - };
  317. -
  318. - key-wifi {
  319. - label = "WiFi";
  320. - linux,code = <KEY_RFKILL>;
  321. - gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  322. - };
  323. -
  324. - key-restart {
  325. - label = "Reset";
  326. - linux,code = <KEY_RESTART>;
  327. - gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
  328. - };
  329. - };
  330. -};
  331. -
  332. -&usb_phy {
  333. - brcm,ioc = <1>;
  334. - status = "okay";
  335. -};
  336. -
  337. -&ehci {
  338. - status = "okay";
  339. -};
  340. -
  341. -&ohci {
  342. - status = "okay";
  343. -};
  344. -
  345. -&xhci {
  346. - status = "okay";
  347. -};
  348. -
  349. -&ports {
  350. - port@0 {
  351. - label = "lan4";
  352. - };
  353. -
  354. - port@1 {
  355. - label = "lan3";
  356. - };
  357. -
  358. - port@2 {
  359. - label = "lan2";
  360. - };
  361. -
  362. - port@3 {
  363. - label = "lan1";
  364. - };
  365. -
  366. - port@7 {
  367. - reg = <7>;
  368. - phy-mode = "internal";
  369. - phy-handle = <&phy12>;
  370. - label = "wan";
  371. - };
  372. -};
  373. -
  374. -&nandcs {
  375. - nand-ecc-strength = <4>;
  376. - nand-ecc-step-size = <512>;
  377. - nand-on-flash-bbt;
  378. -
  379. - #address-cells = <1>;
  380. - #size-cells = <0>;
  381. -
  382. - partitions {
  383. - compatible = "brcm,bcm4908-partitions";
  384. - #address-cells = <1>;
  385. - #size-cells = <1>;
  386. -
  387. - partition@0 {
  388. - label = "cferom";
  389. - reg = <0x0 0x100000>;
  390. - };
  391. -
  392. - partition@100000 {
  393. - compatible = "brcm,bcm4908-firmware";
  394. - reg = <0x100000 0x3900000>;
  395. - };
  396. -
  397. - partition@5800000 {
  398. - compatible = "brcm,bcm4908-firmware";
  399. - reg = <0x3a00000 0x3900000>;
  400. - };
  401. - };
  402. -};
  403. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
  404. +++ /dev/null
  405. @@ -1,34 +0,0 @@
  406. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  407. -
  408. -#include "bcm4908.dtsi"
  409. -
  410. -/ {
  411. - cpus {
  412. - /delete-node/ cpu@2;
  413. -
  414. - /delete-node/ cpu@3;
  415. - };
  416. -
  417. - timer {
  418. - compatible = "arm,armv8-timer";
  419. - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  420. - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  421. - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  422. - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  423. - };
  424. -
  425. - timer {
  426. - compatible = "arm,armv8-timer";
  427. - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  428. - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  429. - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  430. - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  431. - };
  432. -
  433. - pmu {
  434. - compatible = "arm,cortex-a53-pmu";
  435. - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  436. - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  437. - interrupt-affinity = <&cpu0>, <&cpu1>;
  438. - };
  439. -};
  440. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
  441. +++ /dev/null
  442. @@ -1,207 +0,0 @@
  443. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  444. -
  445. -#include <dt-bindings/gpio/gpio.h>
  446. -#include <dt-bindings/input/input.h>
  447. -#include <dt-bindings/leds/common.h>
  448. -
  449. -#include "bcm4908.dtsi"
  450. -
  451. -/ {
  452. - compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca";
  453. - model = "Asus GT-AC5300";
  454. -
  455. - memory@0 {
  456. - device_type = "memory";
  457. - reg = <0x00 0x00 0x00 0x40000000>;
  458. - };
  459. -
  460. - gpio-keys-polled {
  461. - compatible = "gpio-keys-polled";
  462. - poll-interval = <100>;
  463. -
  464. - key-wifi {
  465. - label = "WiFi";
  466. - linux,code = <KEY_RFKILL>;
  467. - gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
  468. - };
  469. -
  470. - key-wps {
  471. - label = "WPS";
  472. - linux,code = <KEY_WPS_BUTTON>;
  473. - gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  474. - };
  475. -
  476. - key-restart {
  477. - label = "Reset";
  478. - linux,code = <KEY_RESTART>;
  479. - gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
  480. - };
  481. -
  482. - key-brightness {
  483. - label = "LEDs";
  484. - linux,code = <KEY_BRIGHTNESS_ZERO>;
  485. - gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
  486. - };
  487. - };
  488. -};
  489. -
  490. -&enet {
  491. - nvmem-cells = <&base_mac_addr>;
  492. - nvmem-cell-names = "mac-address";
  493. -};
  494. -
  495. -&usb_phy {
  496. - brcm,ioc = <1>;
  497. - status = "okay";
  498. -};
  499. -
  500. -&ehci {
  501. - status = "okay";
  502. -};
  503. -
  504. -&ohci {
  505. - status = "okay";
  506. -};
  507. -
  508. -&xhci {
  509. - status = "okay";
  510. -};
  511. -
  512. -&ports {
  513. - port@0 {
  514. - label = "lan2";
  515. - };
  516. -
  517. - port@1 {
  518. - label = "lan1";
  519. - };
  520. -
  521. - port@2 {
  522. - label = "lan6";
  523. - };
  524. -
  525. - port@3 {
  526. - label = "lan5";
  527. - };
  528. -
  529. - /* External BCM53134S switch */
  530. - port@7 {
  531. - label = "sw";
  532. - reg = <7>;
  533. - phy-mode = "rgmii";
  534. -
  535. - fixed-link {
  536. - speed = <1000>;
  537. - full-duplex;
  538. - };
  539. - };
  540. -};
  541. -
  542. -&mdio {
  543. - /* lan8 */
  544. - ethernet-phy@0 {
  545. - reg = <0>;
  546. - };
  547. -
  548. - /* lan7 */
  549. - ethernet-phy@1 {
  550. - reg = <1>;
  551. - };
  552. -
  553. - /* lan4 */
  554. - ethernet-phy@2 {
  555. - reg = <2>;
  556. - };
  557. -
  558. - /* lan3 */
  559. - ethernet-phy@3 {
  560. - reg = <3>;
  561. - };
  562. -};
  563. -
  564. -&leds {
  565. - led-power@11 {
  566. - reg = <0x11>;
  567. - function = LED_FUNCTION_POWER;
  568. - color = <LED_COLOR_ID_WHITE>;
  569. - default-state = "on";
  570. - active-low;
  571. - pinctrl-names = "default";
  572. - pinctrl-0 = <&pins_led_17_a>;
  573. - };
  574. -
  575. - led-wan-red@12 {
  576. - reg = <0x12>;
  577. - function = LED_FUNCTION_WAN;
  578. - color = <LED_COLOR_ID_RED>;
  579. - active-low;
  580. - pinctrl-names = "default";
  581. - pinctrl-0 = <&pins_led_18_a>;
  582. - };
  583. -
  584. - led-wps@14 {
  585. - reg = <0x14>;
  586. - function = LED_FUNCTION_WPS;
  587. - color = <LED_COLOR_ID_WHITE>;
  588. - active-low;
  589. - pinctrl-names = "default";
  590. - pinctrl-0 = <&pins_led_20_a>;
  591. - };
  592. -
  593. - led-wan-white@15 {
  594. - reg = <0x15>;
  595. - function = LED_FUNCTION_WAN;
  596. - color = <LED_COLOR_ID_WHITE>;
  597. - active-low;
  598. - pinctrl-names = "default";
  599. - pinctrl-0 = <&pins_led_21_a>;
  600. - };
  601. -
  602. - led-lan@19 {
  603. - reg = <0x19>;
  604. - function = LED_FUNCTION_LAN;
  605. - color = <LED_COLOR_ID_WHITE>;
  606. - pinctrl-names = "default";
  607. - pinctrl-0 = <&pins_led_25_a>;
  608. - };
  609. -};
  610. -
  611. -&nandcs {
  612. - nand-ecc-strength = <4>;
  613. - nand-ecc-step-size = <512>;
  614. - nand-on-flash-bbt;
  615. - brcm,nand-has-wp;
  616. -
  617. - #address-cells = <1>;
  618. - #size-cells = <0>;
  619. -
  620. - partitions {
  621. - compatible = "brcm,bcm4908-partitions";
  622. - #address-cells = <1>;
  623. - #size-cells = <1>;
  624. -
  625. - partition@0 {
  626. - compatible = "nvmem-cells";
  627. - label = "cferom";
  628. - reg = <0x0 0x100000>;
  629. -
  630. - #address-cells = <1>;
  631. - #size-cells = <1>;
  632. - ranges = <0 0x0 0x100000>;
  633. -
  634. - base_mac_addr: mac@106a0 {
  635. - reg = <0x106a0 0x6>;
  636. - };
  637. - };
  638. -
  639. - partition@100000 {
  640. - compatible = "brcm,bcm4908-firmware";
  641. - reg = <0x100000 0x5700000>;
  642. - };
  643. -
  644. - partition@5800000 {
  645. - compatible = "brcm,bcm4908-firmware";
  646. - reg = <0x5800000 0x5700000>;
  647. - };
  648. - };
  649. -};
  650. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
  651. +++ /dev/null
  652. @@ -1,50 +0,0 @@
  653. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  654. -
  655. -#include "bcm4908.dtsi"
  656. -
  657. -/ {
  658. - compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca";
  659. - model = "Netgear RAXE500";
  660. -
  661. - memory@0 {
  662. - device_type = "memory";
  663. - reg = <0x00 0x00 0x00 0x40000000>;
  664. - };
  665. -};
  666. -
  667. -&ehci {
  668. - status = "okay";
  669. -};
  670. -
  671. -&ohci {
  672. - status = "okay";
  673. -};
  674. -
  675. -&xhci {
  676. - status = "okay";
  677. -};
  678. -
  679. -&ports {
  680. - port@0 {
  681. - label = "lan4";
  682. - };
  683. -
  684. - port@1 {
  685. - label = "lan3";
  686. - };
  687. -
  688. - port@2 {
  689. - label = "lan2";
  690. - };
  691. -
  692. - port@3 {
  693. - label = "lan1";
  694. - };
  695. -
  696. - port@7 {
  697. - reg = <7>;
  698. - phy-mode = "internal";
  699. - phy-handle = <&phy12>;
  700. - label = "wan";
  701. - };
  702. -};
  703. --- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
  704. +++ /dev/null
  705. @@ -1,575 +0,0 @@
  706. -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  707. -
  708. -#include <dt-bindings/interrupt-controller/irq.h>
  709. -#include <dt-bindings/interrupt-controller/arm-gic.h>
  710. -#include <dt-bindings/phy/phy.h>
  711. -#include <dt-bindings/soc/bcm-pmb.h>
  712. -
  713. -/dts-v1/;
  714. -
  715. -/ {
  716. - interrupt-parent = <&gic>;
  717. -
  718. - #address-cells = <2>;
  719. - #size-cells = <2>;
  720. -
  721. - aliases {
  722. - serial0 = &uart0;
  723. - };
  724. -
  725. - chosen {
  726. - stdout-path = "serial0:115200n8";
  727. - };
  728. -
  729. - cpus {
  730. - #address-cells = <1>;
  731. - #size-cells = <0>;
  732. -
  733. - cpu0: cpu@0 {
  734. - device_type = "cpu";
  735. - compatible = "brcm,brahma-b53";
  736. - reg = <0x0>;
  737. - enable-method = "spin-table";
  738. - cpu-release-addr = <0x0 0xfff8>;
  739. - next-level-cache = <&l2>;
  740. - };
  741. -
  742. - cpu1: cpu@1 {
  743. - device_type = "cpu";
  744. - compatible = "brcm,brahma-b53";
  745. - reg = <0x1>;
  746. - enable-method = "spin-table";
  747. - cpu-release-addr = <0x0 0xfff8>;
  748. - next-level-cache = <&l2>;
  749. - };
  750. -
  751. - cpu2: cpu@2 {
  752. - device_type = "cpu";
  753. - compatible = "brcm,brahma-b53";
  754. - reg = <0x2>;
  755. - enable-method = "spin-table";
  756. - cpu-release-addr = <0x0 0xfff8>;
  757. - next-level-cache = <&l2>;
  758. - };
  759. -
  760. - cpu3: cpu@3 {
  761. - device_type = "cpu";
  762. - compatible = "brcm,brahma-b53";
  763. - reg = <0x3>;
  764. - enable-method = "spin-table";
  765. - cpu-release-addr = <0x0 0xfff8>;
  766. - next-level-cache = <&l2>;
  767. - };
  768. -
  769. - l2: l2-cache0 {
  770. - compatible = "cache";
  771. - };
  772. - };
  773. -
  774. - axi@81000000 {
  775. - compatible = "simple-bus";
  776. - #address-cells = <1>;
  777. - #size-cells = <1>;
  778. - ranges = <0x00 0x00 0x81000000 0x4000>;
  779. -
  780. - gic: interrupt-controller@1000 {
  781. - compatible = "arm,gic-400";
  782. - #interrupt-cells = <3>;
  783. - #address-cells = <0>;
  784. - interrupt-controller;
  785. - reg = <0x1000 0x1000>,
  786. - <0x2000 0x2000>;
  787. - };
  788. - };
  789. -
  790. - timer {
  791. - compatible = "arm,armv8-timer";
  792. - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  793. - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  794. - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  795. - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  796. - };
  797. -
  798. - pmu {
  799. - compatible = "arm,cortex-a53-pmu";
  800. - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  801. - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
  802. - <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  803. - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
  804. - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  805. - };
  806. -
  807. - clocks {
  808. - periph_clk: periph_clk {
  809. - compatible = "fixed-clock";
  810. - #clock-cells = <0>;
  811. - clock-frequency = <50000000>;
  812. - clock-output-names = "periph";
  813. - };
  814. - };
  815. -
  816. - soc {
  817. - compatible = "simple-bus";
  818. - #address-cells = <1>;
  819. - #size-cells = <1>;
  820. - ranges = <0x00 0x00 0x80000000 0x281000>;
  821. -
  822. - enet: ethernet@2000 {
  823. - compatible = "brcm,bcm4908-enet";
  824. - reg = <0x2000 0x1000>;
  825. -
  826. - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
  827. - <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
  828. - interrupt-names = "rx", "tx";
  829. - };
  830. -
  831. - usb_phy: usb-phy@c200 {
  832. - compatible = "brcm,bcm4908-usb-phy";
  833. - reg = <0xc200 0x100>;
  834. - reg-names = "ctrl";
  835. - power-domains = <&pmb BCM_PMB_HOST_USB>;
  836. - dr_mode = "host";
  837. - brcm,has-xhci;
  838. - brcm,has-eohci;
  839. - #phy-cells = <1>;
  840. - status = "disabled";
  841. - };
  842. -
  843. - ehci: usb@c300 {
  844. - compatible = "generic-ehci";
  845. - reg = <0xc300 0x100>;
  846. - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  847. - phys = <&usb_phy PHY_TYPE_USB2>;
  848. - status = "disabled";
  849. - };
  850. -
  851. - ohci: usb@c400 {
  852. - compatible = "generic-ohci";
  853. - reg = <0xc400 0x100>;
  854. - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  855. - phys = <&usb_phy PHY_TYPE_USB2>;
  856. - status = "disabled";
  857. - };
  858. -
  859. - xhci: usb@d000 {
  860. - compatible = "generic-xhci";
  861. - reg = <0xd000 0x8c8>;
  862. - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
  863. - phys = <&usb_phy PHY_TYPE_USB3>;
  864. - status = "disabled";
  865. - };
  866. -
  867. - bus@80000 {
  868. - compatible = "simple-bus";
  869. - #size-cells = <1>;
  870. - #address-cells = <1>;
  871. - ranges = <0 0x80000 0x50000>;
  872. -
  873. - ethernet-switch@0 {
  874. - compatible = "brcm,bcm4908-switch";
  875. - reg = <0x0 0x40000>,
  876. - <0x40000 0x110>,
  877. - <0x40340 0x30>,
  878. - <0x40380 0x30>,
  879. - <0x40600 0x34>,
  880. - <0x40800 0x208>;
  881. - reg-names = "core", "reg", "intrl2_0",
  882. - "intrl2_1", "fcb", "acb";
  883. - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
  884. - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
  885. - brcm,num-gphy = <5>;
  886. - brcm,num-rgmii-ports = <2>;
  887. -
  888. - #address-cells = <1>;
  889. - #size-cells = <0>;
  890. -
  891. - ports: ports {
  892. - #address-cells = <1>;
  893. - #size-cells = <0>;
  894. -
  895. - port@0 {
  896. - reg = <0>;
  897. - phy-mode = "internal";
  898. - phy-handle = <&phy8>;
  899. - };
  900. -
  901. - port@1 {
  902. - reg = <1>;
  903. - phy-mode = "internal";
  904. - phy-handle = <&phy9>;
  905. - };
  906. -
  907. - port@2 {
  908. - reg = <2>;
  909. - phy-mode = "internal";
  910. - phy-handle = <&phy10>;
  911. - };
  912. -
  913. - port@3 {
  914. - reg = <3>;
  915. - phy-mode = "internal";
  916. - phy-handle = <&phy11>;
  917. - };
  918. -
  919. - port@8 {
  920. - reg = <8>;
  921. - phy-mode = "internal";
  922. - ethernet = <&enet>;
  923. -
  924. - fixed-link {
  925. - speed = <1000>;
  926. - full-duplex;
  927. - };
  928. - };
  929. - };
  930. - };
  931. -
  932. - mdio: mdio@405c0 {
  933. - compatible = "brcm,unimac-mdio";
  934. - reg = <0x405c0 0x8>;
  935. - reg-names = "mdio";
  936. - #size-cells = <0>;
  937. - #address-cells = <1>;
  938. -
  939. - phy8: ethernet-phy@8 {
  940. - reg = <8>;
  941. - };
  942. -
  943. - phy9: ethernet-phy@9 {
  944. - reg = <9>;
  945. - };
  946. -
  947. - phy10: ethernet-phy@a {
  948. - reg = <10>;
  949. - };
  950. -
  951. - phy11: ethernet-phy@b {
  952. - reg = <11>;
  953. - };
  954. -
  955. - phy12: ethernet-phy@c {
  956. - reg = <12>;
  957. - };
  958. - };
  959. - };
  960. -
  961. - procmon: syscon@280000 {
  962. - compatible = "simple-bus";
  963. - reg = <0x280000 0x1000>;
  964. - ranges;
  965. -
  966. - #address-cells = <1>;
  967. - #size-cells = <1>;
  968. -
  969. - pmb: power-controller@2800c0 {
  970. - compatible = "brcm,bcm4908-pmb";
  971. - reg = <0x2800c0 0x40>;
  972. - #power-domain-cells = <1>;
  973. - };
  974. - };
  975. - };
  976. -
  977. - bus@ff800000 {
  978. - compatible = "simple-bus";
  979. - #address-cells = <1>;
  980. - #size-cells = <1>;
  981. - ranges = <0x00 0x00 0xff800000 0x3000>;
  982. -
  983. - twd: timer-mfd@400 {
  984. - compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
  985. - reg = <0x400 0x4c>;
  986. - ranges = <0x0 0x400 0x4c>;
  987. -
  988. - #address-cells = <1>;
  989. - #size-cells = <1>;
  990. -
  991. - watchdog@28 {
  992. - compatible = "brcm,bcm6345-wdt";
  993. - reg = <0x28 0x8>;
  994. - };
  995. - };
  996. -
  997. - gpio0: gpio-controller@500 {
  998. - compatible = "brcm,bcm6345-gpio";
  999. - reg-names = "dirout", "dat";
  1000. - reg = <0x500 0x28>, <0x528 0x28>;
  1001. -
  1002. - #gpio-cells = <2>;
  1003. - gpio-controller;
  1004. - };
  1005. -
  1006. - pinctrl@560 {
  1007. - compatible = "brcm,bcm4908-pinctrl";
  1008. - reg = <0x560 0x10>;
  1009. -
  1010. - pins_led_0_a: led_0-a-pins {
  1011. - function = "led_0";
  1012. - groups = "led_0_grp_a";
  1013. - };
  1014. -
  1015. - pins_led_1_a: led_1-a-pins {
  1016. - function = "led_1";
  1017. - groups = "led_1_grp_a";
  1018. - };
  1019. -
  1020. - pins_led_2_a: led_2-a-pins {
  1021. - function = "led_2";
  1022. - groups = "led_2_grp_a";
  1023. - };
  1024. -
  1025. - pins_led_3_a: led_3-a-pins {
  1026. - function = "led_3";
  1027. - groups = "led_3_grp_a";
  1028. - };
  1029. -
  1030. - pins_led_4_a: led_4-a-pins {
  1031. - function = "led_4";
  1032. - groups = "led_4_grp_a";
  1033. - };
  1034. -
  1035. - pins_led_5_a: led_5-a-pins {
  1036. - function = "led_5";
  1037. - groups = "led_5_grp_a";
  1038. - };
  1039. -
  1040. - pins_led_6_a: led_6-a-pins {
  1041. - function = "led_6";
  1042. - groups = "led_6_grp_a";
  1043. - };
  1044. -
  1045. - pins_led_7_a: led_7-a-pins {
  1046. - function = "led_7";
  1047. - groups = "led_7_grp_a";
  1048. - };
  1049. -
  1050. - pins_led_8_a: led_8-a-pins {
  1051. - function = "led_8";
  1052. - groups = "led_8_grp_a";
  1053. - };
  1054. -
  1055. - pins_led_9_a: led_9-a-pins {
  1056. - function = "led_9";
  1057. - groups = "led_9_grp_a";
  1058. - };
  1059. -
  1060. - pins_led_10_a: led_10-a-pins {
  1061. - function = "led_10";
  1062. - groups = "led_10_grp_a";
  1063. - };
  1064. -
  1065. - pins_led_11_a: led_11-a-pins {
  1066. - function = "led_11";
  1067. - groups = "led_11_grp_a";
  1068. - };
  1069. -
  1070. - pins_led_12_a: led_12-a-pins {
  1071. - function = "led_12";
  1072. - groups = "led_12_grp_a";
  1073. - };
  1074. -
  1075. - pins_led_13_a: led_13-a-pins {
  1076. - function = "led_13";
  1077. - groups = "led_13_grp_a";
  1078. - };
  1079. -
  1080. - pins_led_14_a: led_14-a-pins {
  1081. - function = "led_14";
  1082. - groups = "led_14_grp_a";
  1083. - };
  1084. -
  1085. - pins_led_15_a: led_15-a-pins {
  1086. - function = "led_15";
  1087. - groups = "led_15_grp_a";
  1088. - };
  1089. -
  1090. - pins_led_16_a: led_16-a-pins {
  1091. - function = "led_16";
  1092. - groups = "led_16_grp_a";
  1093. - };
  1094. -
  1095. - pins_led_17_a: led_17-a-pins {
  1096. - function = "led_17";
  1097. - groups = "led_17_grp_a";
  1098. - };
  1099. -
  1100. - pins_led_18_a: led_18-a-pins {
  1101. - function = "led_18";
  1102. - groups = "led_18_grp_a";
  1103. - };
  1104. -
  1105. - pins_led_19_a: led_19-a-pins {
  1106. - function = "led_19";
  1107. - groups = "led_19_grp_a";
  1108. - };
  1109. -
  1110. - pins_led_20_a: led_20-a-pins {
  1111. - function = "led_20";
  1112. - groups = "led_20_grp_a";
  1113. - };
  1114. -
  1115. - pins_led_21_a: led_21-a-pins {
  1116. - function = "led_21";
  1117. - groups = "led_21_grp_a";
  1118. - };
  1119. -
  1120. - pins_led_22_a: led_22-a-pins {
  1121. - function = "led_22";
  1122. - groups = "led_22_grp_a";
  1123. - };
  1124. -
  1125. - pins_led_23_a: led_23-a-pins {
  1126. - function = "led_23";
  1127. - groups = "led_23_grp_a";
  1128. - };
  1129. -
  1130. - pins_led_24_a: led_24-a-pins {
  1131. - function = "led_24";
  1132. - groups = "led_24_grp_a";
  1133. - };
  1134. -
  1135. - pins_led_25_a: led_25-a-pins {
  1136. - function = "led_25";
  1137. - groups = "led_25_grp_a";
  1138. - };
  1139. -
  1140. - pins_led_26_a: led_26-a-pins {
  1141. - function = "led_26";
  1142. - groups = "led_26_grp_a";
  1143. - };
  1144. -
  1145. - pins_led_27_a: led_27-a-pins {
  1146. - function = "led_27";
  1147. - groups = "led_27_grp_a";
  1148. - };
  1149. -
  1150. - pins_led_28_a: led_28-a-pins {
  1151. - function = "led_28";
  1152. - groups = "led_28_grp_a";
  1153. - };
  1154. -
  1155. - pins_led_29_a: led_29-a-pins {
  1156. - function = "led_29";
  1157. - groups = "led_29_grp_a";
  1158. - };
  1159. -
  1160. - pins_led_30_a: led_30-a-pins {
  1161. - function = "led_30";
  1162. - groups = "led_30_grp_a";
  1163. - };
  1164. -
  1165. - pins_led_31_a: led_31-a-pins {
  1166. - function = "led_31";
  1167. - groups = "led_31_grp_a";
  1168. - };
  1169. -
  1170. - pins_hs_uart: hs_uart-pins {
  1171. - function = "hs_uart";
  1172. - groups = "hs_uart_grp";
  1173. - };
  1174. -
  1175. - pins_i2c_a: i2c-a-pins {
  1176. - function = "i2c";
  1177. - groups = "i2c_grp_a";
  1178. - };
  1179. -
  1180. - pins_i2c_b: i2c-b-pins {
  1181. - function = "i2c";
  1182. - groups = "i2c_grp_b";
  1183. - };
  1184. -
  1185. - pins_i2s: i2s-pins {
  1186. - function = "i2s";
  1187. - groups = "i2s_grp";
  1188. - };
  1189. -
  1190. - pins_nand_ctrl: nand_ctrl-pins {
  1191. - function = "nand_ctrl";
  1192. - groups = "nand_ctrl_grp";
  1193. - };
  1194. -
  1195. - pins_nand_data: nand_data-pins {
  1196. - function = "nand_data";
  1197. - groups = "nand_data_grp";
  1198. - };
  1199. -
  1200. - pins_emmc_ctrl: emmc_ctrl-pins {
  1201. - function = "emmc_ctrl";
  1202. - groups = "emmc_ctrl_grp";
  1203. - };
  1204. -
  1205. - pins_usb0_pwr: usb0_pwr-pins {
  1206. - function = "usb0_pwr";
  1207. - groups = "usb0_pwr_grp";
  1208. - };
  1209. -
  1210. - pins_usb1_pwr: usb1_pwr-pins {
  1211. - function = "usb1_pwr";
  1212. - groups = "usb1_pwr_grp";
  1213. - };
  1214. - };
  1215. -
  1216. - uart0: serial@640 {
  1217. - compatible = "brcm,bcm6345-uart";
  1218. - reg = <0x640 0x18>;
  1219. - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  1220. - clocks = <&periph_clk>;
  1221. - clock-names = "refclk";
  1222. - status = "okay";
  1223. - };
  1224. -
  1225. - leds: leds@800 {
  1226. - compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
  1227. - reg = <0x800 0xdc>;
  1228. -
  1229. - #address-cells = <1>;
  1230. - #size-cells = <0>;
  1231. - };
  1232. -
  1233. - nand-controller@1800 {
  1234. - #address-cells = <1>;
  1235. - #size-cells = <0>;
  1236. - compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
  1237. - reg = <0x1800 0x600>, <0x2000 0x10>;
  1238. - reg-names = "nand", "nand-int-base";
  1239. - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  1240. - interrupt-names = "nand";
  1241. - status = "okay";
  1242. -
  1243. - nandcs: nand@0 {
  1244. - compatible = "brcm,nandcs";
  1245. - reg = <0>;
  1246. - };
  1247. - };
  1248. -
  1249. - i2c@2100 {
  1250. - compatible = "brcm,brcmper-i2c";
  1251. - reg = <0x2100 0x58>;
  1252. - clock-frequency = <97500>;
  1253. - pinctrl-names = "default";
  1254. - pinctrl-0 = <&pins_i2c_a>;
  1255. - status = "disabled";
  1256. - };
  1257. -
  1258. - misc@2600 {
  1259. - compatible = "brcm,misc", "simple-mfd";
  1260. - reg = <0x2600 0xe4>;
  1261. -
  1262. - #address-cells = <1>;
  1263. - #size-cells = <1>;
  1264. - ranges = <0x00 0x2600 0xe4>;
  1265. -
  1266. - reset-controller@2644 {
  1267. - compatible = "brcm,bcm4908-misc-pcie-reset";
  1268. - reg = <0x44 0x04>;
  1269. - #reset-cells = <1>;
  1270. - };
  1271. - };
  1272. - };
  1273. -
  1274. - reboot {
  1275. - compatible = "syscon-reboot";
  1276. - regmap = <&twd>;
  1277. - offset = <0x34>;
  1278. - mask = <1>;
  1279. - };
  1280. -};
  1281. --- /dev/null
  1282. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
  1283. @@ -0,0 +1,157 @@
  1284. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1285. +
  1286. +#include <dt-bindings/gpio/gpio.h>
  1287. +#include <dt-bindings/input/input.h>
  1288. +#include <dt-bindings/leds/common.h>
  1289. +
  1290. +#include "bcm4906.dtsi"
  1291. +
  1292. +/ {
  1293. + compatible = "netgear,r8000p", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";
  1294. + model = "Netgear R8000P";
  1295. +
  1296. + memory@0 {
  1297. + device_type = "memory";
  1298. + reg = <0x00 0x00 0x00 0x20000000>;
  1299. + };
  1300. +
  1301. + leds {
  1302. + compatible = "gpio-leds";
  1303. +
  1304. + led-power-white {
  1305. + function = LED_FUNCTION_POWER;
  1306. + color = <LED_COLOR_ID_WHITE>;
  1307. + gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  1308. + };
  1309. +
  1310. + led-power-amber {
  1311. + function = LED_FUNCTION_POWER;
  1312. + color = <LED_COLOR_ID_AMBER>;
  1313. + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  1314. + };
  1315. +
  1316. + led-wps {
  1317. + function = LED_FUNCTION_WPS;
  1318. + color = <LED_COLOR_ID_WHITE>;
  1319. + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  1320. + };
  1321. +
  1322. + led-2ghz {
  1323. + function = "2ghz";
  1324. + color = <LED_COLOR_ID_WHITE>;
  1325. + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  1326. + };
  1327. +
  1328. + led-5ghz-1 {
  1329. + function = "5ghz-1";
  1330. + color = <LED_COLOR_ID_WHITE>;
  1331. + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  1332. + };
  1333. +
  1334. + led-5ghz-2 {
  1335. + function = "5ghz-2";
  1336. + color = <LED_COLOR_ID_WHITE>;
  1337. + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  1338. + };
  1339. +
  1340. + led-usb2 {
  1341. + function = "usb2";
  1342. + color = <LED_COLOR_ID_WHITE>;
  1343. + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  1344. + };
  1345. +
  1346. + led-usb3 {
  1347. + function = "usb3";
  1348. + color = <LED_COLOR_ID_WHITE>;
  1349. + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  1350. + };
  1351. +
  1352. + led-wifi {
  1353. + function = "wifi";
  1354. + color = <LED_COLOR_ID_WHITE>;
  1355. + gpios = <&gpio0 56 GPIO_ACTIVE_LOW>;
  1356. + };
  1357. + };
  1358. +};
  1359. +
  1360. +&enet {
  1361. + nvmem-cells = <&base_mac_addr>;
  1362. + nvmem-cell-names = "mac-address";
  1363. +};
  1364. +
  1365. +&usb_phy {
  1366. + brcm,ioc = <1>;
  1367. + status = "okay";
  1368. +};
  1369. +
  1370. +&ehci {
  1371. + status = "okay";
  1372. +};
  1373. +
  1374. +&ohci {
  1375. + status = "okay";
  1376. +};
  1377. +
  1378. +&xhci {
  1379. + status = "okay";
  1380. +};
  1381. +
  1382. +&ports {
  1383. + port@0 {
  1384. + label = "lan4";
  1385. + };
  1386. +
  1387. + port@1 {
  1388. + label = "lan3";
  1389. + };
  1390. +
  1391. + port@2 {
  1392. + label = "lan2";
  1393. + };
  1394. +
  1395. + port@3 {
  1396. + label = "lan1";
  1397. + };
  1398. +
  1399. + port@7 {
  1400. + reg = <7>;
  1401. + phy-mode = "internal";
  1402. + phy-handle = <&phy12>;
  1403. + label = "wan";
  1404. + };
  1405. +};
  1406. +
  1407. +&nandcs {
  1408. + nand-ecc-strength = <4>;
  1409. + nand-ecc-step-size = <512>;
  1410. + nand-on-flash-bbt;
  1411. +
  1412. + #address-cells = <1>;
  1413. + #size-cells = <0>;
  1414. +
  1415. + partitions {
  1416. + compatible = "fixed-partitions";
  1417. + #address-cells = <1>;
  1418. + #size-cells = <1>;
  1419. +
  1420. + partition@0 {
  1421. + compatible = "nvmem-cells";
  1422. + label = "cferom";
  1423. + reg = <0x0 0x100000>;
  1424. +
  1425. + #address-cells = <1>;
  1426. + #size-cells = <1>;
  1427. + ranges = <0 0x0 0x100000>;
  1428. +
  1429. + base_mac_addr: mac@106a0 {
  1430. + reg = <0x106a0 0x6>;
  1431. + };
  1432. + };
  1433. +
  1434. + partition@100000 {
  1435. + compatible = "brcm,bcm4908-firmware";
  1436. + label = "firmware";
  1437. + reg = <0x100000 0x4400000>;
  1438. + };
  1439. + };
  1440. +};
  1441. --- /dev/null
  1442. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
  1443. @@ -0,0 +1,182 @@
  1444. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1445. +
  1446. +#include <dt-bindings/gpio/gpio.h>
  1447. +#include <dt-bindings/input/input.h>
  1448. +#include <dt-bindings/leds/common.h>
  1449. +
  1450. +#include "bcm4906.dtsi"
  1451. +
  1452. +/ {
  1453. + compatible = "tplink,archer-c2300-v1", "brcm,bcm4906", "brcm,bcm4908", "brcm,bcmbca";
  1454. + model = "TP-Link Archer C2300 V1";
  1455. +
  1456. + memory@0 {
  1457. + device_type = "memory";
  1458. + reg = <0x00 0x00 0x00 0x20000000>;
  1459. + };
  1460. +
  1461. + leds {
  1462. + compatible = "gpio-leds";
  1463. +
  1464. + led-power {
  1465. + function = LED_FUNCTION_POWER;
  1466. + color = <LED_COLOR_ID_BLUE>;
  1467. + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  1468. + };
  1469. +
  1470. + led-2ghz {
  1471. + function = "2ghz";
  1472. + color = <LED_COLOR_ID_BLUE>;
  1473. + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  1474. + };
  1475. +
  1476. + led-5ghz {
  1477. + function = "5ghz";
  1478. + color = <LED_COLOR_ID_BLUE>;
  1479. + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  1480. + };
  1481. +
  1482. + led-wan-amber {
  1483. + function = LED_FUNCTION_WAN;
  1484. + color = <LED_COLOR_ID_AMBER>;
  1485. + gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  1486. + };
  1487. +
  1488. + led-wan-blue {
  1489. + function = LED_FUNCTION_WAN;
  1490. + color = <LED_COLOR_ID_BLUE>;
  1491. + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  1492. + };
  1493. +
  1494. + led-lan {
  1495. + function = LED_FUNCTION_LAN;
  1496. + color = <LED_COLOR_ID_BLUE>;
  1497. + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  1498. + };
  1499. +
  1500. + led-wps {
  1501. + function = LED_FUNCTION_WPS;
  1502. + color = <LED_COLOR_ID_BLUE>;
  1503. + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  1504. + };
  1505. +
  1506. + led-usb2 {
  1507. + function = "usb2";
  1508. + color = <LED_COLOR_ID_BLUE>;
  1509. + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  1510. + };
  1511. +
  1512. + led-usb3 {
  1513. + function = "usbd3";
  1514. + color = <LED_COLOR_ID_BLUE>;
  1515. + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  1516. + };
  1517. +
  1518. + led-brightness {
  1519. + function = LED_FUNCTION_BACKLIGHT;
  1520. + color = <LED_COLOR_ID_WHITE>;
  1521. + gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
  1522. + };
  1523. + };
  1524. +
  1525. + gpio-keys-polled {
  1526. + compatible = "gpio-keys-polled";
  1527. + poll-interval = <100>;
  1528. +
  1529. + key-brightness {
  1530. + label = "LEDs";
  1531. + linux,code = <KEY_BRIGHTNESS_ZERO>;
  1532. + gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  1533. + };
  1534. +
  1535. + key-wps {
  1536. + label = "WPS";
  1537. + linux,code = <KEY_WPS_BUTTON>;
  1538. + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
  1539. + };
  1540. +
  1541. + key-wifi {
  1542. + label = "WiFi";
  1543. + linux,code = <KEY_RFKILL>;
  1544. + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  1545. + };
  1546. +
  1547. + key-restart {
  1548. + label = "Reset";
  1549. + linux,code = <KEY_RESTART>;
  1550. + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
  1551. + };
  1552. + };
  1553. +};
  1554. +
  1555. +&usb_phy {
  1556. + brcm,ioc = <1>;
  1557. + status = "okay";
  1558. +};
  1559. +
  1560. +&ehci {
  1561. + status = "okay";
  1562. +};
  1563. +
  1564. +&ohci {
  1565. + status = "okay";
  1566. +};
  1567. +
  1568. +&xhci {
  1569. + status = "okay";
  1570. +};
  1571. +
  1572. +&ports {
  1573. + port@0 {
  1574. + label = "lan4";
  1575. + };
  1576. +
  1577. + port@1 {
  1578. + label = "lan3";
  1579. + };
  1580. +
  1581. + port@2 {
  1582. + label = "lan2";
  1583. + };
  1584. +
  1585. + port@3 {
  1586. + label = "lan1";
  1587. + };
  1588. +
  1589. + port@7 {
  1590. + reg = <7>;
  1591. + phy-mode = "internal";
  1592. + phy-handle = <&phy12>;
  1593. + label = "wan";
  1594. + };
  1595. +};
  1596. +
  1597. +&nandcs {
  1598. + nand-ecc-strength = <4>;
  1599. + nand-ecc-step-size = <512>;
  1600. + nand-on-flash-bbt;
  1601. +
  1602. + #address-cells = <1>;
  1603. + #size-cells = <0>;
  1604. +
  1605. + partitions {
  1606. + compatible = "brcm,bcm4908-partitions";
  1607. + #address-cells = <1>;
  1608. + #size-cells = <1>;
  1609. +
  1610. + partition@0 {
  1611. + label = "cferom";
  1612. + reg = <0x0 0x100000>;
  1613. + };
  1614. +
  1615. + partition@100000 {
  1616. + compatible = "brcm,bcm4908-firmware";
  1617. + reg = <0x100000 0x3900000>;
  1618. + };
  1619. +
  1620. + partition@5800000 {
  1621. + compatible = "brcm,bcm4908-firmware";
  1622. + reg = <0x3a00000 0x3900000>;
  1623. + };
  1624. + };
  1625. +};
  1626. --- /dev/null
  1627. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906.dtsi
  1628. @@ -0,0 +1,34 @@
  1629. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1630. +
  1631. +#include "bcm4908.dtsi"
  1632. +
  1633. +/ {
  1634. + cpus {
  1635. + /delete-node/ cpu@2;
  1636. +
  1637. + /delete-node/ cpu@3;
  1638. + };
  1639. +
  1640. + timer {
  1641. + compatible = "arm,armv8-timer";
  1642. + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1643. + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1644. + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1645. + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  1646. + };
  1647. +
  1648. + timer {
  1649. + compatible = "arm,armv8-timer";
  1650. + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1651. + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1652. + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  1653. + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  1654. + };
  1655. +
  1656. + pmu {
  1657. + compatible = "arm,cortex-a53-pmu";
  1658. + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  1659. + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  1660. + interrupt-affinity = <&cpu0>, <&cpu1>;
  1661. + };
  1662. +};
  1663. --- /dev/null
  1664. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
  1665. @@ -0,0 +1,207 @@
  1666. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1667. +
  1668. +#include <dt-bindings/gpio/gpio.h>
  1669. +#include <dt-bindings/input/input.h>
  1670. +#include <dt-bindings/leds/common.h>
  1671. +
  1672. +#include "bcm4908.dtsi"
  1673. +
  1674. +/ {
  1675. + compatible = "asus,gt-ac5300", "brcm,bcm4908", "brcm,bcmbca";
  1676. + model = "Asus GT-AC5300";
  1677. +
  1678. + memory@0 {
  1679. + device_type = "memory";
  1680. + reg = <0x00 0x00 0x00 0x40000000>;
  1681. + };
  1682. +
  1683. + gpio-keys-polled {
  1684. + compatible = "gpio-keys-polled";
  1685. + poll-interval = <100>;
  1686. +
  1687. + key-wifi {
  1688. + label = "WiFi";
  1689. + linux,code = <KEY_RFKILL>;
  1690. + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
  1691. + };
  1692. +
  1693. + key-wps {
  1694. + label = "WPS";
  1695. + linux,code = <KEY_WPS_BUTTON>;
  1696. + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  1697. + };
  1698. +
  1699. + key-restart {
  1700. + label = "Reset";
  1701. + linux,code = <KEY_RESTART>;
  1702. + gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
  1703. + };
  1704. +
  1705. + key-brightness {
  1706. + label = "LEDs";
  1707. + linux,code = <KEY_BRIGHTNESS_ZERO>;
  1708. + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
  1709. + };
  1710. + };
  1711. +};
  1712. +
  1713. +&enet {
  1714. + nvmem-cells = <&base_mac_addr>;
  1715. + nvmem-cell-names = "mac-address";
  1716. +};
  1717. +
  1718. +&usb_phy {
  1719. + brcm,ioc = <1>;
  1720. + status = "okay";
  1721. +};
  1722. +
  1723. +&ehci {
  1724. + status = "okay";
  1725. +};
  1726. +
  1727. +&ohci {
  1728. + status = "okay";
  1729. +};
  1730. +
  1731. +&xhci {
  1732. + status = "okay";
  1733. +};
  1734. +
  1735. +&ports {
  1736. + port@0 {
  1737. + label = "lan2";
  1738. + };
  1739. +
  1740. + port@1 {
  1741. + label = "lan1";
  1742. + };
  1743. +
  1744. + port@2 {
  1745. + label = "lan6";
  1746. + };
  1747. +
  1748. + port@3 {
  1749. + label = "lan5";
  1750. + };
  1751. +
  1752. + /* External BCM53134S switch */
  1753. + port@7 {
  1754. + label = "sw";
  1755. + reg = <7>;
  1756. + phy-mode = "rgmii";
  1757. +
  1758. + fixed-link {
  1759. + speed = <1000>;
  1760. + full-duplex;
  1761. + };
  1762. + };
  1763. +};
  1764. +
  1765. +&mdio {
  1766. + /* lan8 */
  1767. + ethernet-phy@0 {
  1768. + reg = <0>;
  1769. + };
  1770. +
  1771. + /* lan7 */
  1772. + ethernet-phy@1 {
  1773. + reg = <1>;
  1774. + };
  1775. +
  1776. + /* lan4 */
  1777. + ethernet-phy@2 {
  1778. + reg = <2>;
  1779. + };
  1780. +
  1781. + /* lan3 */
  1782. + ethernet-phy@3 {
  1783. + reg = <3>;
  1784. + };
  1785. +};
  1786. +
  1787. +&leds {
  1788. + led-power@11 {
  1789. + reg = <0x11>;
  1790. + function = LED_FUNCTION_POWER;
  1791. + color = <LED_COLOR_ID_WHITE>;
  1792. + default-state = "on";
  1793. + active-low;
  1794. + pinctrl-names = "default";
  1795. + pinctrl-0 = <&pins_led_17_a>;
  1796. + };
  1797. +
  1798. + led-wan-red@12 {
  1799. + reg = <0x12>;
  1800. + function = LED_FUNCTION_WAN;
  1801. + color = <LED_COLOR_ID_RED>;
  1802. + active-low;
  1803. + pinctrl-names = "default";
  1804. + pinctrl-0 = <&pins_led_18_a>;
  1805. + };
  1806. +
  1807. + led-wps@14 {
  1808. + reg = <0x14>;
  1809. + function = LED_FUNCTION_WPS;
  1810. + color = <LED_COLOR_ID_WHITE>;
  1811. + active-low;
  1812. + pinctrl-names = "default";
  1813. + pinctrl-0 = <&pins_led_20_a>;
  1814. + };
  1815. +
  1816. + led-wan-white@15 {
  1817. + reg = <0x15>;
  1818. + function = LED_FUNCTION_WAN;
  1819. + color = <LED_COLOR_ID_WHITE>;
  1820. + active-low;
  1821. + pinctrl-names = "default";
  1822. + pinctrl-0 = <&pins_led_21_a>;
  1823. + };
  1824. +
  1825. + led-lan@19 {
  1826. + reg = <0x19>;
  1827. + function = LED_FUNCTION_LAN;
  1828. + color = <LED_COLOR_ID_WHITE>;
  1829. + pinctrl-names = "default";
  1830. + pinctrl-0 = <&pins_led_25_a>;
  1831. + };
  1832. +};
  1833. +
  1834. +&nandcs {
  1835. + nand-ecc-strength = <4>;
  1836. + nand-ecc-step-size = <512>;
  1837. + nand-on-flash-bbt;
  1838. + brcm,nand-has-wp;
  1839. +
  1840. + #address-cells = <1>;
  1841. + #size-cells = <0>;
  1842. +
  1843. + partitions {
  1844. + compatible = "brcm,bcm4908-partitions";
  1845. + #address-cells = <1>;
  1846. + #size-cells = <1>;
  1847. +
  1848. + partition@0 {
  1849. + compatible = "nvmem-cells";
  1850. + label = "cferom";
  1851. + reg = <0x0 0x100000>;
  1852. +
  1853. + #address-cells = <1>;
  1854. + #size-cells = <1>;
  1855. + ranges = <0 0x0 0x100000>;
  1856. +
  1857. + base_mac_addr: mac@106a0 {
  1858. + reg = <0x106a0 0x6>;
  1859. + };
  1860. + };
  1861. +
  1862. + partition@100000 {
  1863. + compatible = "brcm,bcm4908-firmware";
  1864. + reg = <0x100000 0x5700000>;
  1865. + };
  1866. +
  1867. + partition@5800000 {
  1868. + compatible = "brcm,bcm4908-firmware";
  1869. + reg = <0x5800000 0x5700000>;
  1870. + };
  1871. + };
  1872. +};
  1873. --- /dev/null
  1874. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts
  1875. @@ -0,0 +1,50 @@
  1876. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1877. +
  1878. +#include "bcm4908.dtsi"
  1879. +
  1880. +/ {
  1881. + compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca";
  1882. + model = "Netgear RAXE500";
  1883. +
  1884. + memory@0 {
  1885. + device_type = "memory";
  1886. + reg = <0x00 0x00 0x00 0x40000000>;
  1887. + };
  1888. +};
  1889. +
  1890. +&ehci {
  1891. + status = "okay";
  1892. +};
  1893. +
  1894. +&ohci {
  1895. + status = "okay";
  1896. +};
  1897. +
  1898. +&xhci {
  1899. + status = "okay";
  1900. +};
  1901. +
  1902. +&ports {
  1903. + port@0 {
  1904. + label = "lan4";
  1905. + };
  1906. +
  1907. + port@1 {
  1908. + label = "lan3";
  1909. + };
  1910. +
  1911. + port@2 {
  1912. + label = "lan2";
  1913. + };
  1914. +
  1915. + port@3 {
  1916. + label = "lan1";
  1917. + };
  1918. +
  1919. + port@7 {
  1920. + reg = <7>;
  1921. + phy-mode = "internal";
  1922. + phy-handle = <&phy12>;
  1923. + label = "wan";
  1924. + };
  1925. +};
  1926. --- /dev/null
  1927. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
  1928. @@ -0,0 +1,575 @@
  1929. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  1930. +
  1931. +#include <dt-bindings/interrupt-controller/irq.h>
  1932. +#include <dt-bindings/interrupt-controller/arm-gic.h>
  1933. +#include <dt-bindings/phy/phy.h>
  1934. +#include <dt-bindings/soc/bcm-pmb.h>
  1935. +
  1936. +/dts-v1/;
  1937. +
  1938. +/ {
  1939. + interrupt-parent = <&gic>;
  1940. +
  1941. + #address-cells = <2>;
  1942. + #size-cells = <2>;
  1943. +
  1944. + aliases {
  1945. + serial0 = &uart0;
  1946. + };
  1947. +
  1948. + chosen {
  1949. + stdout-path = "serial0:115200n8";
  1950. + };
  1951. +
  1952. + cpus {
  1953. + #address-cells = <1>;
  1954. + #size-cells = <0>;
  1955. +
  1956. + cpu0: cpu@0 {
  1957. + device_type = "cpu";
  1958. + compatible = "brcm,brahma-b53";
  1959. + reg = <0x0>;
  1960. + enable-method = "spin-table";
  1961. + cpu-release-addr = <0x0 0xfff8>;
  1962. + next-level-cache = <&l2>;
  1963. + };
  1964. +
  1965. + cpu1: cpu@1 {
  1966. + device_type = "cpu";
  1967. + compatible = "brcm,brahma-b53";
  1968. + reg = <0x1>;
  1969. + enable-method = "spin-table";
  1970. + cpu-release-addr = <0x0 0xfff8>;
  1971. + next-level-cache = <&l2>;
  1972. + };
  1973. +
  1974. + cpu2: cpu@2 {
  1975. + device_type = "cpu";
  1976. + compatible = "brcm,brahma-b53";
  1977. + reg = <0x2>;
  1978. + enable-method = "spin-table";
  1979. + cpu-release-addr = <0x0 0xfff8>;
  1980. + next-level-cache = <&l2>;
  1981. + };
  1982. +
  1983. + cpu3: cpu@3 {
  1984. + device_type = "cpu";
  1985. + compatible = "brcm,brahma-b53";
  1986. + reg = <0x3>;
  1987. + enable-method = "spin-table";
  1988. + cpu-release-addr = <0x0 0xfff8>;
  1989. + next-level-cache = <&l2>;
  1990. + };
  1991. +
  1992. + l2: l2-cache0 {
  1993. + compatible = "cache";
  1994. + };
  1995. + };
  1996. +
  1997. + axi@81000000 {
  1998. + compatible = "simple-bus";
  1999. + #address-cells = <1>;
  2000. + #size-cells = <1>;
  2001. + ranges = <0x00 0x00 0x81000000 0x4000>;
  2002. +
  2003. + gic: interrupt-controller@1000 {
  2004. + compatible = "arm,gic-400";
  2005. + #interrupt-cells = <3>;
  2006. + #address-cells = <0>;
  2007. + interrupt-controller;
  2008. + reg = <0x1000 0x1000>,
  2009. + <0x2000 0x2000>;
  2010. + };
  2011. + };
  2012. +
  2013. + timer {
  2014. + compatible = "arm,armv8-timer";
  2015. + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  2016. + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  2017. + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  2018. + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  2019. + };
  2020. +
  2021. + pmu {
  2022. + compatible = "arm,cortex-a53-pmu";
  2023. + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  2024. + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
  2025. + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  2026. + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
  2027. + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
  2028. + };
  2029. +
  2030. + clocks {
  2031. + periph_clk: periph_clk {
  2032. + compatible = "fixed-clock";
  2033. + #clock-cells = <0>;
  2034. + clock-frequency = <50000000>;
  2035. + clock-output-names = "periph";
  2036. + };
  2037. + };
  2038. +
  2039. + soc {
  2040. + compatible = "simple-bus";
  2041. + #address-cells = <1>;
  2042. + #size-cells = <1>;
  2043. + ranges = <0x00 0x00 0x80000000 0x281000>;
  2044. +
  2045. + enet: ethernet@2000 {
  2046. + compatible = "brcm,bcm4908-enet";
  2047. + reg = <0x2000 0x1000>;
  2048. +
  2049. + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
  2050. + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
  2051. + interrupt-names = "rx", "tx";
  2052. + };
  2053. +
  2054. + usb_phy: usb-phy@c200 {
  2055. + compatible = "brcm,bcm4908-usb-phy";
  2056. + reg = <0xc200 0x100>;
  2057. + reg-names = "ctrl";
  2058. + power-domains = <&pmb BCM_PMB_HOST_USB>;
  2059. + dr_mode = "host";
  2060. + brcm,has-xhci;
  2061. + brcm,has-eohci;
  2062. + #phy-cells = <1>;
  2063. + status = "disabled";
  2064. + };
  2065. +
  2066. + ehci: usb@c300 {
  2067. + compatible = "generic-ehci";
  2068. + reg = <0xc300 0x100>;
  2069. + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  2070. + phys = <&usb_phy PHY_TYPE_USB2>;
  2071. + status = "disabled";
  2072. + };
  2073. +
  2074. + ohci: usb@c400 {
  2075. + compatible = "generic-ohci";
  2076. + reg = <0xc400 0x100>;
  2077. + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  2078. + phys = <&usb_phy PHY_TYPE_USB2>;
  2079. + status = "disabled";
  2080. + };
  2081. +
  2082. + xhci: usb@d000 {
  2083. + compatible = "generic-xhci";
  2084. + reg = <0xd000 0x8c8>;
  2085. + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
  2086. + phys = <&usb_phy PHY_TYPE_USB3>;
  2087. + status = "disabled";
  2088. + };
  2089. +
  2090. + bus@80000 {
  2091. + compatible = "simple-bus";
  2092. + #size-cells = <1>;
  2093. + #address-cells = <1>;
  2094. + ranges = <0 0x80000 0x50000>;
  2095. +
  2096. + ethernet-switch@0 {
  2097. + compatible = "brcm,bcm4908-switch";
  2098. + reg = <0x0 0x40000>,
  2099. + <0x40000 0x110>,
  2100. + <0x40340 0x30>,
  2101. + <0x40380 0x30>,
  2102. + <0x40600 0x34>,
  2103. + <0x40800 0x208>;
  2104. + reg-names = "core", "reg", "intrl2_0",
  2105. + "intrl2_1", "fcb", "acb";
  2106. + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
  2107. + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
  2108. + brcm,num-gphy = <5>;
  2109. + brcm,num-rgmii-ports = <2>;
  2110. +
  2111. + #address-cells = <1>;
  2112. + #size-cells = <0>;
  2113. +
  2114. + ports: ports {
  2115. + #address-cells = <1>;
  2116. + #size-cells = <0>;
  2117. +
  2118. + port@0 {
  2119. + reg = <0>;
  2120. + phy-mode = "internal";
  2121. + phy-handle = <&phy8>;
  2122. + };
  2123. +
  2124. + port@1 {
  2125. + reg = <1>;
  2126. + phy-mode = "internal";
  2127. + phy-handle = <&phy9>;
  2128. + };
  2129. +
  2130. + port@2 {
  2131. + reg = <2>;
  2132. + phy-mode = "internal";
  2133. + phy-handle = <&phy10>;
  2134. + };
  2135. +
  2136. + port@3 {
  2137. + reg = <3>;
  2138. + phy-mode = "internal";
  2139. + phy-handle = <&phy11>;
  2140. + };
  2141. +
  2142. + port@8 {
  2143. + reg = <8>;
  2144. + phy-mode = "internal";
  2145. + ethernet = <&enet>;
  2146. +
  2147. + fixed-link {
  2148. + speed = <1000>;
  2149. + full-duplex;
  2150. + };
  2151. + };
  2152. + };
  2153. + };
  2154. +
  2155. + mdio: mdio@405c0 {
  2156. + compatible = "brcm,unimac-mdio";
  2157. + reg = <0x405c0 0x8>;
  2158. + reg-names = "mdio";
  2159. + #size-cells = <0>;
  2160. + #address-cells = <1>;
  2161. +
  2162. + phy8: ethernet-phy@8 {
  2163. + reg = <8>;
  2164. + };
  2165. +
  2166. + phy9: ethernet-phy@9 {
  2167. + reg = <9>;
  2168. + };
  2169. +
  2170. + phy10: ethernet-phy@a {
  2171. + reg = <10>;
  2172. + };
  2173. +
  2174. + phy11: ethernet-phy@b {
  2175. + reg = <11>;
  2176. + };
  2177. +
  2178. + phy12: ethernet-phy@c {
  2179. + reg = <12>;
  2180. + };
  2181. + };
  2182. + };
  2183. +
  2184. + procmon: syscon@280000 {
  2185. + compatible = "simple-bus";
  2186. + reg = <0x280000 0x1000>;
  2187. + ranges;
  2188. +
  2189. + #address-cells = <1>;
  2190. + #size-cells = <1>;
  2191. +
  2192. + pmb: power-controller@2800c0 {
  2193. + compatible = "brcm,bcm4908-pmb";
  2194. + reg = <0x2800c0 0x40>;
  2195. + #power-domain-cells = <1>;
  2196. + };
  2197. + };
  2198. + };
  2199. +
  2200. + bus@ff800000 {
  2201. + compatible = "simple-bus";
  2202. + #address-cells = <1>;
  2203. + #size-cells = <1>;
  2204. + ranges = <0x00 0x00 0xff800000 0x3000>;
  2205. +
  2206. + twd: timer-mfd@400 {
  2207. + compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
  2208. + reg = <0x400 0x4c>;
  2209. + ranges = <0x0 0x400 0x4c>;
  2210. +
  2211. + #address-cells = <1>;
  2212. + #size-cells = <1>;
  2213. +
  2214. + watchdog@28 {
  2215. + compatible = "brcm,bcm6345-wdt";
  2216. + reg = <0x28 0x8>;
  2217. + };
  2218. + };
  2219. +
  2220. + gpio0: gpio-controller@500 {
  2221. + compatible = "brcm,bcm6345-gpio";
  2222. + reg-names = "dirout", "dat";
  2223. + reg = <0x500 0x28>, <0x528 0x28>;
  2224. +
  2225. + #gpio-cells = <2>;
  2226. + gpio-controller;
  2227. + };
  2228. +
  2229. + pinctrl@560 {
  2230. + compatible = "brcm,bcm4908-pinctrl";
  2231. + reg = <0x560 0x10>;
  2232. +
  2233. + pins_led_0_a: led_0-a-pins {
  2234. + function = "led_0";
  2235. + groups = "led_0_grp_a";
  2236. + };
  2237. +
  2238. + pins_led_1_a: led_1-a-pins {
  2239. + function = "led_1";
  2240. + groups = "led_1_grp_a";
  2241. + };
  2242. +
  2243. + pins_led_2_a: led_2-a-pins {
  2244. + function = "led_2";
  2245. + groups = "led_2_grp_a";
  2246. + };
  2247. +
  2248. + pins_led_3_a: led_3-a-pins {
  2249. + function = "led_3";
  2250. + groups = "led_3_grp_a";
  2251. + };
  2252. +
  2253. + pins_led_4_a: led_4-a-pins {
  2254. + function = "led_4";
  2255. + groups = "led_4_grp_a";
  2256. + };
  2257. +
  2258. + pins_led_5_a: led_5-a-pins {
  2259. + function = "led_5";
  2260. + groups = "led_5_grp_a";
  2261. + };
  2262. +
  2263. + pins_led_6_a: led_6-a-pins {
  2264. + function = "led_6";
  2265. + groups = "led_6_grp_a";
  2266. + };
  2267. +
  2268. + pins_led_7_a: led_7-a-pins {
  2269. + function = "led_7";
  2270. + groups = "led_7_grp_a";
  2271. + };
  2272. +
  2273. + pins_led_8_a: led_8-a-pins {
  2274. + function = "led_8";
  2275. + groups = "led_8_grp_a";
  2276. + };
  2277. +
  2278. + pins_led_9_a: led_9-a-pins {
  2279. + function = "led_9";
  2280. + groups = "led_9_grp_a";
  2281. + };
  2282. +
  2283. + pins_led_10_a: led_10-a-pins {
  2284. + function = "led_10";
  2285. + groups = "led_10_grp_a";
  2286. + };
  2287. +
  2288. + pins_led_11_a: led_11-a-pins {
  2289. + function = "led_11";
  2290. + groups = "led_11_grp_a";
  2291. + };
  2292. +
  2293. + pins_led_12_a: led_12-a-pins {
  2294. + function = "led_12";
  2295. + groups = "led_12_grp_a";
  2296. + };
  2297. +
  2298. + pins_led_13_a: led_13-a-pins {
  2299. + function = "led_13";
  2300. + groups = "led_13_grp_a";
  2301. + };
  2302. +
  2303. + pins_led_14_a: led_14-a-pins {
  2304. + function = "led_14";
  2305. + groups = "led_14_grp_a";
  2306. + };
  2307. +
  2308. + pins_led_15_a: led_15-a-pins {
  2309. + function = "led_15";
  2310. + groups = "led_15_grp_a";
  2311. + };
  2312. +
  2313. + pins_led_16_a: led_16-a-pins {
  2314. + function = "led_16";
  2315. + groups = "led_16_grp_a";
  2316. + };
  2317. +
  2318. + pins_led_17_a: led_17-a-pins {
  2319. + function = "led_17";
  2320. + groups = "led_17_grp_a";
  2321. + };
  2322. +
  2323. + pins_led_18_a: led_18-a-pins {
  2324. + function = "led_18";
  2325. + groups = "led_18_grp_a";
  2326. + };
  2327. +
  2328. + pins_led_19_a: led_19-a-pins {
  2329. + function = "led_19";
  2330. + groups = "led_19_grp_a";
  2331. + };
  2332. +
  2333. + pins_led_20_a: led_20-a-pins {
  2334. + function = "led_20";
  2335. + groups = "led_20_grp_a";
  2336. + };
  2337. +
  2338. + pins_led_21_a: led_21-a-pins {
  2339. + function = "led_21";
  2340. + groups = "led_21_grp_a";
  2341. + };
  2342. +
  2343. + pins_led_22_a: led_22-a-pins {
  2344. + function = "led_22";
  2345. + groups = "led_22_grp_a";
  2346. + };
  2347. +
  2348. + pins_led_23_a: led_23-a-pins {
  2349. + function = "led_23";
  2350. + groups = "led_23_grp_a";
  2351. + };
  2352. +
  2353. + pins_led_24_a: led_24-a-pins {
  2354. + function = "led_24";
  2355. + groups = "led_24_grp_a";
  2356. + };
  2357. +
  2358. + pins_led_25_a: led_25-a-pins {
  2359. + function = "led_25";
  2360. + groups = "led_25_grp_a";
  2361. + };
  2362. +
  2363. + pins_led_26_a: led_26-a-pins {
  2364. + function = "led_26";
  2365. + groups = "led_26_grp_a";
  2366. + };
  2367. +
  2368. + pins_led_27_a: led_27-a-pins {
  2369. + function = "led_27";
  2370. + groups = "led_27_grp_a";
  2371. + };
  2372. +
  2373. + pins_led_28_a: led_28-a-pins {
  2374. + function = "led_28";
  2375. + groups = "led_28_grp_a";
  2376. + };
  2377. +
  2378. + pins_led_29_a: led_29-a-pins {
  2379. + function = "led_29";
  2380. + groups = "led_29_grp_a";
  2381. + };
  2382. +
  2383. + pins_led_30_a: led_30-a-pins {
  2384. + function = "led_30";
  2385. + groups = "led_30_grp_a";
  2386. + };
  2387. +
  2388. + pins_led_31_a: led_31-a-pins {
  2389. + function = "led_31";
  2390. + groups = "led_31_grp_a";
  2391. + };
  2392. +
  2393. + pins_hs_uart: hs_uart-pins {
  2394. + function = "hs_uart";
  2395. + groups = "hs_uart_grp";
  2396. + };
  2397. +
  2398. + pins_i2c_a: i2c-a-pins {
  2399. + function = "i2c";
  2400. + groups = "i2c_grp_a";
  2401. + };
  2402. +
  2403. + pins_i2c_b: i2c-b-pins {
  2404. + function = "i2c";
  2405. + groups = "i2c_grp_b";
  2406. + };
  2407. +
  2408. + pins_i2s: i2s-pins {
  2409. + function = "i2s";
  2410. + groups = "i2s_grp";
  2411. + };
  2412. +
  2413. + pins_nand_ctrl: nand_ctrl-pins {
  2414. + function = "nand_ctrl";
  2415. + groups = "nand_ctrl_grp";
  2416. + };
  2417. +
  2418. + pins_nand_data: nand_data-pins {
  2419. + function = "nand_data";
  2420. + groups = "nand_data_grp";
  2421. + };
  2422. +
  2423. + pins_emmc_ctrl: emmc_ctrl-pins {
  2424. + function = "emmc_ctrl";
  2425. + groups = "emmc_ctrl_grp";
  2426. + };
  2427. +
  2428. + pins_usb0_pwr: usb0_pwr-pins {
  2429. + function = "usb0_pwr";
  2430. + groups = "usb0_pwr_grp";
  2431. + };
  2432. +
  2433. + pins_usb1_pwr: usb1_pwr-pins {
  2434. + function = "usb1_pwr";
  2435. + groups = "usb1_pwr_grp";
  2436. + };
  2437. + };
  2438. +
  2439. + uart0: serial@640 {
  2440. + compatible = "brcm,bcm6345-uart";
  2441. + reg = <0x640 0x18>;
  2442. + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  2443. + clocks = <&periph_clk>;
  2444. + clock-names = "refclk";
  2445. + status = "okay";
  2446. + };
  2447. +
  2448. + leds: leds@800 {
  2449. + compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
  2450. + reg = <0x800 0xdc>;
  2451. +
  2452. + #address-cells = <1>;
  2453. + #size-cells = <0>;
  2454. + };
  2455. +
  2456. + nand-controller@1800 {
  2457. + #address-cells = <1>;
  2458. + #size-cells = <0>;
  2459. + compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
  2460. + reg = <0x1800 0x600>, <0x2000 0x10>;
  2461. + reg-names = "nand", "nand-int-base";
  2462. + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  2463. + interrupt-names = "nand";
  2464. + status = "okay";
  2465. +
  2466. + nandcs: nand@0 {
  2467. + compatible = "brcm,nandcs";
  2468. + reg = <0>;
  2469. + };
  2470. + };
  2471. +
  2472. + i2c@2100 {
  2473. + compatible = "brcm,brcmper-i2c";
  2474. + reg = <0x2100 0x58>;
  2475. + clock-frequency = <97500>;
  2476. + pinctrl-names = "default";
  2477. + pinctrl-0 = <&pins_i2c_a>;
  2478. + status = "disabled";
  2479. + };
  2480. +
  2481. + misc@2600 {
  2482. + compatible = "brcm,misc", "simple-mfd";
  2483. + reg = <0x2600 0xe4>;
  2484. +
  2485. + #address-cells = <1>;
  2486. + #size-cells = <1>;
  2487. + ranges = <0x00 0x2600 0xe4>;
  2488. +
  2489. + reset-controller@2644 {
  2490. + compatible = "brcm,bcm4908-misc-pcie-reset";
  2491. + reg = <0x44 0x04>;
  2492. + #reset-cells = <1>;
  2493. + };
  2494. + };
  2495. + };
  2496. +
  2497. + reboot {
  2498. + compatible = "syscon-reboot";
  2499. + regmap = <&twd>;
  2500. + offset = <0x34>;
  2501. + mask = <1>;
  2502. + };
  2503. +};