290-mt7981-add-USB-nodes.patch 2.0 KB

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  1. From cca5775031e4890f195246772e00f7f4ae7438f6 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <[email protected]>
  3. Date: Mon, 19 Feb 2024 05:52:24 +0100
  4. Subject: [PATCH 1/2] mt7981.dtsi: add USB nodes
  5. Signed-off-by: John Crispin <[email protected]>
  6. ---
  7. arch/arm/dts/mt7981.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++
  8. 1 file changed, 47 insertions(+)
  9. diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
  10. index bda80ac9..6f4e5b9f 100644
  11. --- a/arch/arm/dts/mt7981.dtsi
  12. +++ b/arch/arm/dts/mt7981.dtsi
  13. @@ -6,6 +6,7 @@
  14. #include <dt-bindings/interrupt-controller/irq.h>
  15. #include <dt-bindings/interrupt-controller/arm-gic.h>
  16. +#include <dt-bindings/phy/phy.h>
  17. #include <dt-bindings/clock/mt7981-clk.h>
  18. #include <dt-bindings/reset/mt7629-reset.h>
  19. #include <dt-bindings/pinctrl/mt65xx.h>
  20. @@ -342,4 +343,50 @@
  21. status = "disabled";
  22. };
  23. + xhci: xhci@11200000 {
  24. + compatible = "mediatek,mt7981-xhci",
  25. + "mediatek,mtk-xhci";
  26. + reg = <0x11200000 0x2e00>,
  27. + <0x11203e00 0x0100>;
  28. + reg-names = "mac", "ippc";
  29. + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
  30. + phys = <&u2port0 PHY_TYPE_USB2>,
  31. + <&u3port0 PHY_TYPE_USB3>;
  32. + clocks = <&infracfg_ao CK_INFRA_IUSB_SYS_CK>,
  33. + <&infracfg_ao CK_INFRA_IUSB_CK>,
  34. + <&infracfg_ao CK_INFRA_IUSB_133_CK>,
  35. + <&infracfg_ao CK_INFRA_IUSB_66M_CK>,
  36. + <&topckgen CK_TOP_U2U3_XHCI_SEL>;
  37. + clock-names = "sys_ck",
  38. + "ref_ck",
  39. + "mcu_ck",
  40. + "dma_ck",
  41. + "xhci_ck";
  42. + mediatek,u3p-dis-msk = <0x1>;
  43. + status = "okay";
  44. + };
  45. +
  46. + usbtphy: usb-phy@11e10000 {
  47. + compatible = "mediatek,mt7981",
  48. + "mediatek,generic-tphy-v2";
  49. + #address-cells = <1>;
  50. + #size-cells = <1>;
  51. + status = "okay";
  52. +
  53. + u2port0: usb-phy@11e10000 {
  54. + reg = <0x11e10000 0x700>;
  55. + clocks = <&topckgen CK_TOP_USB_FRMCNT_SEL>;
  56. + clock-names = "ref";
  57. + #phy-cells = <1>;
  58. + status = "okay";
  59. + };
  60. +
  61. + u3port0: usb-phy@11e10700 {
  62. + reg = <0x11e10700 0x900>;
  63. + clocks = <&topckgen CK_TOP_USB3_PHY_SEL>;
  64. + clock-names = "ref";
  65. + #phy-cells = <1>;
  66. + status = "okay";
  67. + };
  68. + };
  69. };
  70. --
  71. 2.34.1