openwrt/target/linux/oxnas/files/arch/arm/boot/dts/ox820-cloudengines-pogoplugpro.dts

/*
 * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
 *
 * Copyright (C) 2016 Neil Armstrong <[email protected]>
 *
 * Licensed under GPLv2 or later
 */

/dts-v1/;
#include "ox820.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Cloud Engines PogoPlug Pro";

	compatible = "cloudengines,pogoplugpro", "oxsemi,ox820";

	chosen {
		bootargs = "earlyprintk console=ttyS0,115200";
		stdout-path = "serial0:115200n8";
	};

	memory {
		/* 128Mbytes DDR */
		reg = <0x60000000 0x8000000>;
	};

	aliases {
		serial0 = &uart0;
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		led-boot = &led_status;
		led-failsafe = &led_warn;
		led-running = &led_act;
		led-upgrade = &led_warn;
	};

	leds {
		compatible = "gpio-leds";

		led_status: blue {
			label = "pogoplug:blue";
			gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		led_warn: orange {
			label = "pogoplug:orange";
			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

		led_act: green {
			label = "pogoplug:green";
			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};
	};
};

&uart0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart0>;
};

&nandc {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_nand>;

	nand@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		nand-ecc-mode = "soft";
		nand-ecc-algo = "hamming";

		partition@0 {
			label = "stage1";
			reg = <0x00000000 0x00040000>;
			read-only;
		};

		partition@40000 {
			label = "u-boot";
			reg = <0x00040000 0x00380000>;
			read-only;
		};

		partition@3c0000 {
			label = "u-boot-env";
			reg = <0x003c0000 0x00080000>;
		};

		partition@440000 {
			label = "kernel";
			reg = <0x00440000 0x009c0000>;
		};

		partition@e00000 {
			label = "ubi";
			reg = <0x00e00000 0x07200000>;
		};
	};
};

&ehci {
	status = "okay";
};

&etha {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_etha_mdio>;
};

&sata {
	status = "okay";
};

&pcie_phy {
	status = "okay";
};

&pcie0 {
	status = "okay";
};