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- From: Johan Almbladh <[email protected]>
- Date: Tue, 5 Oct 2021 18:54:03 +0200
- Subject: [PATCH] mips: uasm: Add workaround for Loongson-2F nop CPU errata
- This patch implements a workaround for the Loongson-2F nop in generated,
- code, if the existing option CONFIG_CPU_NOP_WORKAROUND is set. Before,
- the binutils option -mfix-loongson2f-nop was enabled, but no workaround
- was done when emitting MIPS code. Now, the nop pseudo instruction is
- emitted as "or ax,ax,zero" instead of the default "sll zero,zero,0". This
- is consistent with the workaround implemented by binutils.
- Link: https://sourceware.org/legacy-ml/binutils/2009-11/msg00387.html
- Signed-off-by: Johan Almbladh <[email protected]>
- Reviewed-by: Jiaxun Yang <[email protected]>
- ---
- --- a/arch/mips/include/asm/uasm.h
- +++ b/arch/mips/include/asm/uasm.h
- @@ -249,7 +249,11 @@ static inline void uasm_l##lb(struct uas
- #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
- #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
- #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
- +#ifdef CONFIG_CPU_NOP_WORKAROUNDS
- +#define uasm_i_nop(buf) uasm_i_or(buf, 1, 1, 0)
- +#else
- #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
- +#endif
- #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
-
- static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
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