armada-385-nas1dual.dts 6.1 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
  2. /*
  3. * Device Tree file for ipTIME NAS1dual
  4. *
  5. * Copyright (C) 2020 Sungbo Eo <[email protected]>
  6. *
  7. * Based on armada-385-linksys.dtsi
  8. * Copyright (C) 2015 Imre Kaloz <[email protected]>
  9. */
  10. /dts-v1/;
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/input/input.h>
  13. #include <dt-bindings/leds/common.h>
  14. #include "armada-385.dtsi"
  15. / {
  16. model = "ipTIME NAS1dual";
  17. compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380";
  18. aliases {
  19. led-boot = &led_ready;
  20. led-failsafe = &led_ready;
  21. led-running = &led_ready;
  22. led-upgrade = &led_ready;
  23. label-mac-device = &eth0;
  24. };
  25. chosen {
  26. bootargs = "console=ttyS0,115200n8";
  27. stdout-path = "serial0:115200n8";
  28. };
  29. memory@0 {
  30. device_type = "memory";
  31. reg = <0x00000000 0x80000000>; /* 2GB */
  32. };
  33. soc {
  34. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  35. MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
  36. MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
  37. MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
  38. MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
  39. };
  40. gpio-keys {
  41. compatible = "gpio-keys";
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&gpio_keys_pins>;
  44. power {
  45. label = "Power Button";
  46. linux,input-type = <EV_SW>;
  47. linux,code = <KEY_POWER>;
  48. gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
  49. };
  50. reset {
  51. label = "Reset Button";
  52. linux,code = <KEY_RESTART>;
  53. gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
  54. };
  55. copy {
  56. label = "USB Copy Button";
  57. linux,code = <KEY_COPY>;
  58. gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
  59. };
  60. };
  61. gpio-leds {
  62. compatible = "gpio-leds";
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&gpio_leds_pins>;
  65. led_ready: ready {
  66. label = "blue:ready";
  67. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  68. };
  69. hdd {
  70. label = "blue:hdd";
  71. gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
  72. linux,default-trigger = "disk-activity";
  73. };
  74. usb {
  75. function = LED_FUNCTION_USB;
  76. color = <LED_COLOR_ID_BLUE>;
  77. gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
  78. trigger-sources = <&usb3_0_port1 &usb3_0_port2>;
  79. linux,default-trigger = "usbport";
  80. };
  81. };
  82. gpio-fan {
  83. compatible = "gpio-fan";
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&gpio_fan_pins>;
  86. gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>,
  87. <&gpio1 18 GPIO_ACTIVE_HIGH>;
  88. /* We don't know the exact rpm, just use dummy values here. */
  89. gpio-fan,speed-map = <0 0>, <1 1>, <2 2>;
  90. #cooling-cells = <2>;
  91. };
  92. gpio-poweroff {
  93. compatible = "gpio-poweroff";
  94. gpios = <&pca9536 1 GPIO_ACTIVE_LOW>;
  95. };
  96. regulators {
  97. compatible = "simple-bus";
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&sata_power_pins>;
  102. reg_sata_power: regulator@1 {
  103. compatible = "regulator-fixed";
  104. reg = <1>;
  105. regulator-name = "sata-power";
  106. regulator-min-microvolt = <12000000>;
  107. regulator-max-microvolt = <12000000>;
  108. gpio = <&gpio1 20 GPIO_ACTIVE_LOW>;
  109. regulator-always-on;
  110. };
  111. };
  112. };
  113. &ahci0 {
  114. status = "okay";
  115. #address-cells = <1>;
  116. #size-cells = <0>;
  117. sata-port@0 {
  118. reg = <0>;
  119. target-supply = <&reg_sata_power>;
  120. #thermal-sensor-cells = <0>;
  121. };
  122. };
  123. &bm {
  124. status = "okay";
  125. };
  126. &bm_bppi {
  127. status = "okay";
  128. };
  129. &eth0 {
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&ge0_rgmii_pins>;
  132. status = "okay";
  133. phy-handle = <&ethphy1>;
  134. phy-connection-type = "rgmii-id";
  135. buffer-manager = <&bm>;
  136. bm,pool-long = <0>;
  137. bm,pool-short = <1>;
  138. nvmem-cells = <&macaddr_uboot_fffa8>;
  139. nvmem-cell-names = "mac-address";
  140. };
  141. &eth1 {
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&ge1_rgmii_pins>;
  144. status = "okay";
  145. phy-handle = <&ethphy0>;
  146. phy-connection-type = "rgmii-id";
  147. buffer-manager = <&bm>;
  148. bm,pool-long = <2>;
  149. bm,pool-short = <3>;
  150. nvmem-cells = <&macaddr_uboot_fffa8>;
  151. nvmem-cell-names = "mac-address";
  152. };
  153. &i2c0 {
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&i2c0_pins>;
  156. status = "okay";
  157. pca9536: gpio@41 {
  158. compatible = "nxp,pca9536";
  159. reg = <0x41>;
  160. gpio-controller;
  161. #gpio-cells = <2>;
  162. gpio-line-names = "power-led", "power-board";
  163. };
  164. };
  165. &mdio {
  166. pinctrl-names = "default";
  167. pinctrl-0 = <&mdio_pins>;
  168. /* LED1: On - Link, Blink - Activity, Off - No Link */
  169. ethphy0: ethernet-phy@0 {
  170. reg = <0>;
  171. marvell,reg-init = <3 16 0 0x1017>;
  172. };
  173. ethphy1: ethernet-phy@1 {
  174. reg = <1>;
  175. marvell,reg-init = <3 16 0 0x1017>;
  176. };
  177. };
  178. &pinctrl {
  179. gpio_keys_pins: gpio-keys-pins {
  180. marvell,pins = "mpp24", "mpp26", "mpp48";
  181. marvell,function = "gpio";
  182. };
  183. gpio_leds_pins: gpio-leds-pins {
  184. marvell,pins = "mpp18", "mpp20", "mpp51";
  185. marvell,function = "gpio";
  186. };
  187. gpio_fan_pins: gpio-fan-pins {
  188. marvell,pins = "mpp25", "mpp50";
  189. marvell,function = "gpio";
  190. };
  191. sata_power_pins: sata-power-pins {
  192. marvell,pins = "mpp52";
  193. marvell,function = "gpio";
  194. };
  195. uart1_pins_alt: uart-pins-1-alt {
  196. marvell,pins = "mpp45", "mpp46";
  197. marvell,function = "ua1";
  198. };
  199. };
  200. &spi1 {
  201. pinctrl-names = "default";
  202. pinctrl-0 = <&spi1_pins>;
  203. status = "okay";
  204. flash@0 {
  205. compatible = "jedec,spi-nor";
  206. reg = <0>;
  207. spi-max-frequency = <40000000>;
  208. partitions {
  209. compatible = "fixed-partitions";
  210. #address-cells = <1>;
  211. #size-cells = <1>;
  212. partition@0 {
  213. reg = <0x00000000 0x00100000>;
  214. label = "u-boot";
  215. read-only;
  216. nvmem-layout {
  217. compatible = "fixed-layout";
  218. #address-cells = <1>;
  219. #size-cells = <1>;
  220. macaddr_uboot_fffa8: macaddr@fffa8 {
  221. reg = <0xfffa8 0x6>;
  222. };
  223. };
  224. };
  225. partition@100000 {
  226. reg = <0x00100000 0x03ec0000>;
  227. label = "firmware";
  228. compatible = "fixed-partitions";
  229. #address-cells = <1>;
  230. #size-cells = <1>;
  231. partition@0 {
  232. reg = <0x00000000 0x00600000>;
  233. label = "kernel";
  234. };
  235. partition@600000 {
  236. reg = <0x00600000 0x038c0000>;
  237. label = "rootfs";
  238. };
  239. };
  240. partition@3fc0000 {
  241. reg = <0x03fc0000 0x00040000>;
  242. label = "config";
  243. read-only;
  244. };
  245. };
  246. };
  247. };
  248. &uart0 {
  249. pinctrl-names = "default";
  250. pinctrl-0 = <&uart0_pins>;
  251. status = "okay";
  252. };
  253. &uart1 {
  254. pinctrl-names = "default";
  255. pinctrl-0 = <&uart1_pins_alt>;
  256. status = "okay";
  257. };
  258. &usb3_0 {
  259. status = "okay";
  260. #address-cells = <1>;
  261. #size-cells = <0>;
  262. usb3_0_port1: port@1 {
  263. reg = <1>;
  264. #trigger-source-cells = <0>;
  265. };
  266. usb3_0_port2: port@2 {
  267. reg = <2>;
  268. #trigger-source-cells = <0>;
  269. };
  270. };