120-10-v5.18-mtd-nand-fix-ecc-parameters-for-mt7622.patch 2.9 KB

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  1. From 41825166744c6e5664281611f5e6d9a2e9333c2b Mon Sep 17 00:00:00 2001
  2. From: Chuanhong Guo <[email protected]>
  3. Date: Sat, 2 Apr 2022 22:31:20 +0800
  4. Subject: [PATCH 10/15] mtd: nand: fix ecc parameters for mt7622
  5. According to the datasheet, mt7622 only has 5 ECC capabilities instead
  6. of 7, and the decoding error register is arranged as follows:
  7. +------+---------+---------+---------+---------+
  8. | Bits | 19:15 | 14:10 | 9:5 | 4:0 |
  9. +------+---------+---------+---------+---------+
  10. | Name | ERRNUM3 | ERRNUM2 | ERRNUM1 | ERRNUM0 |
  11. +------+---------+---------+---------+---------+
  12. This means err_mask should be 0x1f instead of 0x3f and the number of
  13. bits shifted in mtk_ecc_get_stats should be 5 instead of 8.
  14. This commit introduces err_shift for the difference in this register
  15. and fix other existing parameters.
  16. Public MT7622 reference manual can be found on [0] and the info this
  17. commit is based on is from page 656 and page 660.
  18. [0]: https://wiki.banana-pi.org/Banana_Pi_BPI-R64#Documents
  19. Fixes: 98dea8d71931 ("mtd: nand: mtk: Support MT7622 NAND flash controller.")
  20. Signed-off-by: Chuanhong Guo <[email protected]>
  21. (cherry picked from commit 088b769abd1bd21753002b17b696ae1778b16e8c)
  22. ---
  23. drivers/mtd/nand/raw/mtk_ecc.c | 12 ++++++++----
  24. 1 file changed, 8 insertions(+), 4 deletions(-)
  25. --- a/drivers/mtd/nand/raw/mtk_ecc.c
  26. +++ b/drivers/mtd/nand/raw/mtk_ecc.c
  27. @@ -43,6 +43,7 @@
  28. struct mtk_ecc_caps {
  29. u32 err_mask;
  30. + u32 err_shift;
  31. const u8 *ecc_strength;
  32. const u32 *ecc_regs;
  33. u8 num_ecc_strength;
  34. @@ -76,7 +77,7 @@ static const u8 ecc_strength_mt2712[] =
  35. };
  36. static const u8 ecc_strength_mt7622[] = {
  37. - 4, 6, 8, 10, 12, 14, 16
  38. + 4, 6, 8, 10, 12
  39. };
  40. enum mtk_ecc_regs {
  41. @@ -221,7 +222,7 @@ void mtk_ecc_get_stats(struct mtk_ecc *e
  42. for (i = 0; i < sectors; i++) {
  43. offset = (i >> 2) << 2;
  44. err = readl(ecc->regs + ECC_DECENUM0 + offset);
  45. - err = err >> ((i % 4) * 8);
  46. + err = err >> ((i % 4) * ecc->caps->err_shift);
  47. err &= ecc->caps->err_mask;
  48. if (err == ecc->caps->err_mask) {
  49. /* uncorrectable errors */
  50. @@ -449,6 +450,7 @@ EXPORT_SYMBOL(mtk_ecc_get_parity_bits);
  51. static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = {
  52. .err_mask = 0x3f,
  53. + .err_shift = 8,
  54. .ecc_strength = ecc_strength_mt2701,
  55. .ecc_regs = mt2701_ecc_regs,
  56. .num_ecc_strength = 20,
  57. @@ -459,6 +461,7 @@ static const struct mtk_ecc_caps mtk_ecc
  58. static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
  59. .err_mask = 0x7f,
  60. + .err_shift = 8,
  61. .ecc_strength = ecc_strength_mt2712,
  62. .ecc_regs = mt2712_ecc_regs,
  63. .num_ecc_strength = 23,
  64. @@ -468,10 +471,11 @@ static const struct mtk_ecc_caps mtk_ecc
  65. };
  66. static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
  67. - .err_mask = 0x3f,
  68. + .err_mask = 0x1f,
  69. + .err_shift = 5,
  70. .ecc_strength = ecc_strength_mt7622,
  71. .ecc_regs = mt7622_ecc_regs,
  72. - .num_ecc_strength = 7,
  73. + .num_ecc_strength = 5,
  74. .ecc_mode_shift = 4,
  75. .parity_bits = 13,
  76. .pg_irq_sel = 0,