bcm6358.dtsi 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /dts-v1/;
  3. #include <dt-bindings/clock/bcm6358-clock.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h>
  7. #include <dt-bindings/reset/bcm6358-reset.h>
  8. / {
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. compatible = "brcm,bcm6358";
  12. aliases {
  13. pflash = &pflash;
  14. pinctrl = &pinctrl;
  15. serial0 = &uart0;
  16. serial1 = &uart1;
  17. spi0 = &lsspi;
  18. };
  19. chosen {
  20. bootargs = "earlycon";
  21. stdout-path = "serial0:115200n8";
  22. };
  23. clocks {
  24. periph_osc: periph-osc {
  25. compatible = "fixed-clock";
  26. #clock-cells = <0>;
  27. clock-frequency = <50000000>;
  28. clock-output-names = "periph";
  29. };
  30. };
  31. cpus {
  32. #address-cells = <1>;
  33. #size-cells = <0>;
  34. mips-hpt-frequency = <150000000>;
  35. cpu@0 {
  36. compatible = "brcm,bmips4350", "mips,mips4Kc";
  37. device_type = "cpu";
  38. reg = <0>;
  39. };
  40. cpu@1 {
  41. compatible = "brcm,bmips4350", "mips,mips4Kc";
  42. device_type = "cpu";
  43. reg = <1>;
  44. };
  45. };
  46. cpu_intc: interrupt-controller {
  47. #address-cells = <0>;
  48. compatible = "mti,cpu-interrupt-controller";
  49. interrupt-controller;
  50. #interrupt-cells = <1>;
  51. };
  52. memory@0 {
  53. device_type = "memory";
  54. reg = <0 0>;
  55. };
  56. pflash: nor@1e000000 {
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. compatible = "cfi-flash";
  60. reg = <0x1e000000 0x2000000>;
  61. bank-width = <2>;
  62. status = "disabled";
  63. };
  64. ubus {
  65. #address-cells = <1>;
  66. #size-cells = <1>;
  67. compatible = "simple-bus";
  68. ranges;
  69. periph_clk: clock-controller@fffe0004 {
  70. compatible = "brcm,bcm6358-clocks";
  71. reg = <0xfffe0004 0x4>;
  72. #clock-cells = <1>;
  73. };
  74. pll_cntl: syscon@fffe0008 {
  75. compatible = "syscon", "simple-mfd";
  76. reg = <0xfffe0008 0x4>;
  77. native-endian;
  78. syscon-reboot {
  79. compatible = "syscon-reboot";
  80. offset = <0x0>;
  81. mask = <0x1>;
  82. };
  83. };
  84. periph_intc: interrupt-controller@fffe000c {
  85. #address-cells = <1>;
  86. compatible = "brcm,bcm6345-l1-intc";
  87. reg = <0xfffe000c 0x8>,
  88. <0xfffe0038 0x8>;
  89. interrupt-controller;
  90. #interrupt-cells = <1>;
  91. interrupt-parent = <&cpu_intc>;
  92. interrupts = <2>, <3>;
  93. };
  94. ext_intc0: interrupt-controller@fffe0014 {
  95. #address-cells = <1>;
  96. compatible = "brcm,bcm6345-ext-intc";
  97. reg = <0xfffe0014 0x4>;
  98. interrupt-controller;
  99. #interrupt-cells = <2>;
  100. interrupts = <BCM6358_IRQ_EXT0>,
  101. <BCM6358_IRQ_EXT1>,
  102. <BCM6358_IRQ_EXT2>,
  103. <BCM6358_IRQ_EXT3>;
  104. };
  105. ext_intc1: interrupt-controller@fffe001c {
  106. #address-cells = <1>;
  107. compatible = "brcm,bcm6345-ext-intc";
  108. reg = <0xfffe001c 0x4>;
  109. interrupt-controller;
  110. #interrupt-cells = <2>;
  111. interrupts = <BCM6358_IRQ_EXT4>,
  112. <BCM6358_IRQ_EXT5>;
  113. };
  114. periph_rst: reset-controller@fffe0034 {
  115. compatible = "brcm,bcm6345-reset";
  116. reg = <0xfffe0034 0x4>;
  117. #reset-cells = <1>;
  118. };
  119. wdt: watchdog@fffe005c {
  120. compatible = "brcm,bcm7038-wdt";
  121. reg = <0xfffe005c 0xc>;
  122. clocks = <&periph_osc>;
  123. timeout-sec = <30>;
  124. };
  125. gpio_cntl: syscon@fffe0080 {
  126. compatible = "brcm,bcm6358-gpio-sysctl",
  127. "syscon", "simple-mfd";
  128. reg = <0xfffe0080 0x50>;
  129. ranges = <0 0xfffe0080 0x80>;
  130. native-endian;
  131. gpio: gpio@0 {
  132. compatible = "brcm,bcm6358-gpio";
  133. reg-names = "dirout", "dat";
  134. reg = <0x0 0x8>, <0x8 0x8>;
  135. gpio-controller;
  136. gpio-ranges = <&pinctrl 0 0 40>;
  137. #gpio-cells = <2>;
  138. };
  139. pinctrl: pinctrl@18 {
  140. compatible = "brcm,bcm6358-pinctrl";
  141. reg = <0x18 0x4>;
  142. pinctrl_ebi_cs: ebi_cs-pins {
  143. function = "ebi_cs";
  144. groups = "ebi_cs_grp";
  145. };
  146. pinctrl_uart1: uart1-pins {
  147. function = "uart1";
  148. groups = "uart1_grp";
  149. };
  150. pinctrl_serial_led: serial_led-pins {
  151. function = "serial_led";
  152. groups = "serial_led_grp";
  153. };
  154. pinctrl_legacy_led: legacy_led-pins {
  155. function = "legacy_led";
  156. groups = "legacy_led_grp";
  157. };
  158. pinctrl_led: led-pins {
  159. function = "led";
  160. groups = "led_grp";
  161. };
  162. pinctrl_spi_cs_23: spi_cs-pins {
  163. function = "spi_cs";
  164. groups = "spi_cs_grp";
  165. };
  166. pinctrl_utopia: utopia-pins {
  167. function = "utopia";
  168. groups = "utopia_grp";
  169. };
  170. pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
  171. function = "pwm_syn_clk";
  172. groups = "pwm_syn_clk_grp";
  173. };
  174. pinctrl_sys_irq: sys_irq-pins {
  175. function = "sys_irq";
  176. groups = "sys_irq_grp";
  177. };
  178. };
  179. };
  180. leds: led-controller@fffe00d0 {
  181. #address-cells = <1>;
  182. #size-cells = <0>;
  183. compatible = "brcm,bcm6358-leds";
  184. reg = <0xfffe00d0 0x8>;
  185. status = "disabled";
  186. };
  187. uart0: serial@fffe0100 {
  188. compatible = "brcm,bcm6345-uart";
  189. reg = <0xfffe0100 0x18>;
  190. interrupt-parent = <&periph_intc>;
  191. interrupts = <BCM6358_IRQ_UART0>;
  192. clocks = <&periph_osc>;
  193. clock-names = "periph";
  194. status = "disabled";
  195. };
  196. uart1: serial@fffe0120 {
  197. compatible = "brcm,bcm6345-uart";
  198. reg = <0xfffe0120 0x18>;
  199. interrupt-parent = <&periph_intc>;
  200. interrupts = <BCM6358_IRQ_UART1>;
  201. clocks = <&periph_osc>;
  202. clock-names = "periph";
  203. status = "disabled";
  204. };
  205. lsspi: spi@fffe0800 {
  206. #address-cells = <1>;
  207. #size-cells = <0>;
  208. compatible = "brcm,bcm6358-spi";
  209. reg = <0xfffe0800 0x70c>;
  210. interrupt-parent = <&periph_intc>;
  211. interrupts = <BCM6358_IRQ_SPI>;
  212. clocks = <&periph_clk BCM6358_CLK_SPI>;
  213. clock-names = "spi";
  214. resets = <&periph_rst BCM6358_RST_SPI>;
  215. status = "disabled";
  216. };
  217. pci: pci@fffe1000 {
  218. compatible = "brcm,bcm6348-pci";
  219. reg = <0xfffe1000 0x200>,
  220. <0x08000000 0x10000>;
  221. reg-names = "pci",
  222. "pci-io";
  223. #address-cells = <3>;
  224. #size-cells = <2>;
  225. device_type = "pci";
  226. bus-range = <0x00 0x01>;
  227. ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>;
  228. linux,pci-probe-only = <1>;
  229. interrupt-parent = <&periph_intc>;
  230. interrupts = <BCM6358_IRQ_MPI>;
  231. resets = <&periph_rst BCM6358_RST_MPI>;
  232. reset-names = "pci";
  233. brcm,remap;
  234. status = "disabled";
  235. };
  236. ehci: usb@fffe1300 {
  237. compatible = "brcm,bcm6358-ehci", "generic-ehci";
  238. reg = <0xfffe1300 0x100>;
  239. big-endian;
  240. spurious-oc;
  241. interrupt-parent = <&periph_intc>;
  242. interrupts = <BCM6358_IRQ_EHCI>;
  243. phys = <&usbh 0>;
  244. phy-names = "usb";
  245. status = "disabled";
  246. };
  247. ohci: usb@fffe1400 {
  248. compatible = "brcm,bcm6358-ohci", "generic-ohci";
  249. reg = <0xfffe1400 0x100>;
  250. big-endian;
  251. no-big-frame-no;
  252. interrupt-parent = <&periph_intc>;
  253. interrupts = <BCM6358_IRQ_OHCI>;
  254. phys = <&usbh 0>;
  255. phy-names = "usb";
  256. status = "disabled";
  257. };
  258. usbh: usb-phy@fffe1500 {
  259. compatible = "brcm,bcm6358-usbh-phy";
  260. reg = <0xfffe1500 0x38>;
  261. #phy-cells = <1>;
  262. resets = <&periph_rst BCM6358_RST_USBH>;
  263. status = "disabled";
  264. };
  265. };
  266. };