701-net-0149-soc-fsl-dpio-change-CENA-regs-to-be-cacheable.patch 2.4 KB

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  1. From e2b0ebb44e91e3492f26d21218fb7ea5e14190ec Mon Sep 17 00:00:00 2001
  2. From: Haiying Wang <[email protected]>
  3. Date: Thu, 20 Apr 2017 11:54:22 -0400
  4. Subject: [PATCH] soc: fsl: dpio: change CENA regs to be cacheable
  5. Change cache enabled regsiter accessed to be cacheable
  6. plus non-shareable to meet the performance requirement.
  7. QMan's CENA region contains registers and structures that
  8. are 64byte in size and are inteneded to be accessed using a
  9. single 64 byte bus transaction, therefore this portal
  10. memory should be configured as cache-enabled. Also because
  11. the write allocate stash transcations of QBMan should be
  12. issued as cachable and non-coherent(non-sharable), we
  13. need to configure this region to be non-shareable.
  14. Signed-off-by: Haiying Wang <[email protected]>
  15. ---
  16. drivers/soc/fsl/dpio/dpio-driver.c | 17 ++++++++++-------
  17. 1 file changed, 10 insertions(+), 7 deletions(-)
  18. --- a/drivers/soc/fsl/dpio/dpio-driver.c
  19. +++ b/drivers/soc/fsl/dpio/dpio-driver.c
  20. @@ -27,6 +27,11 @@ MODULE_LICENSE("Dual BSD/GPL");
  21. MODULE_AUTHOR("Freescale Semiconductor, Inc");
  22. MODULE_DESCRIPTION("DPIO Driver");
  23. +#define PROT_NORMAL_NS (PTE_TYPE_PAGE | PTE_AF | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
  24. +
  25. +#define ioremap_cache_ns(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NS))
  26. +
  27. +
  28. struct dpio_priv {
  29. struct dpaa2_io *io;
  30. };
  31. @@ -197,13 +202,11 @@ static int dpaa2_dpio_probe(struct fsl_m
  32. if (dpio_dev->obj_desc.region_count < 3) {
  33. /* No support for DDR backed portals, use classic mapping */
  34. /*
  35. - * Set the CENA regs to be the cache inhibited area of the
  36. - * portal to avoid coherency issues if a user migrates to
  37. - * another core.
  38. + * Set the CENA regs to be the cache enabled area of the portal to
  39. + * achieve the best performance.
  40. */
  41. - desc.regs_cena = devm_memremap(dev, dpio_dev->regions[1].start,
  42. - resource_size(&dpio_dev->regions[1]),
  43. - MEMREMAP_WC);
  44. + desc.regs_cena = ioremap_cache_ns(dpio_dev->regions[0].start,
  45. + resource_size(&dpio_dev->regions[0]));
  46. } else {
  47. desc.regs_cena = devm_memremap(dev, dpio_dev->regions[2].start,
  48. resource_size(&dpio_dev->regions[2]),
  49. @@ -211,7 +214,7 @@ static int dpaa2_dpio_probe(struct fsl_m
  50. }
  51. if (IS_ERR(desc.regs_cena)) {
  52. - dev_err(dev, "devm_memremap failed\n");
  53. + dev_err(dev, "ioremap_cache_ns failed\n");
  54. err = PTR_ERR(desc.regs_cena);
  55. goto err_allocate_irqs;
  56. }