qca9563_dlink_dir-859-a1.dts 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include "qca956x.dtsi"
  6. / {
  7. model = "D-Link DIR-859 A1";
  8. compatible = "dlink,dir-859-a1", "qca,qca9563";
  9. aliases {
  10. led-boot = &power;
  11. led-failsafe = &power;
  12. led-running = &power;
  13. led-upgrade = &power;
  14. };
  15. chosen {
  16. bootargs = "console=ttyS0,115200n8";
  17. };
  18. leds {
  19. compatible = "gpio-leds";
  20. wps {
  21. label = "dir-859-a1:green:wps";
  22. gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  23. };
  24. power: power {
  25. label = "dir-859-a1:green:power";
  26. gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  27. };
  28. internet {
  29. label = "dir-859-a1:green:internet";
  30. gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  31. };
  32. wlan {
  33. label = "dir-859-a1:green:wlan";
  34. gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  35. linux,default-trigger = "phy0tpt";
  36. };
  37. };
  38. keys {
  39. compatible = "gpio-keys-polled";
  40. poll-interval = <20>;
  41. wps {
  42. linux,code = <KEY_RESTART>;
  43. gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  44. debounce-interval = <60>;
  45. };
  46. reset {
  47. linux,code = <KEY_RESTART>;
  48. gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  49. debounce-interval = <60>;
  50. };
  51. };
  52. gpio-export {
  53. compatible = "gpio-export";
  54. #size-cells = <0>;
  55. gpio_switch_reset {
  56. gpio-export,name = "dir-859-a1:reset:switch";
  57. gpio-export,output = <1>;
  58. gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
  59. };
  60. };
  61. };
  62. &uart {
  63. status = "okay";
  64. };
  65. &gpio {
  66. status = "okay";
  67. };
  68. &pcie {
  69. status = "okay";
  70. };
  71. &spi {
  72. num-cs = <1>;
  73. status = "okay";
  74. flash@0 {
  75. compatible = "jedec,spi-nor";
  76. reg = <0>;
  77. spi-max-frequency = <30000000>;
  78. partitions {
  79. compatible = "fixed-partitions";
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. partition@0 {
  83. label = "bootloader";
  84. reg = <0x000000 0x40000>;
  85. read-only;
  86. };
  87. partition@40000 {
  88. label = "bdcfg";
  89. reg = <0x040000 0x10000>;
  90. read-only;
  91. };
  92. partition@50000 {
  93. label = "devdata";
  94. reg = <0x050000 0x10000>;
  95. read-only;
  96. };
  97. partition@60000 {
  98. label = "devconf";
  99. reg = <0x060000 0x10000>;
  100. read-only;
  101. };
  102. partition@70000 {
  103. compatible = "seama";
  104. label = "firmware";
  105. reg = <0x070000 0xf80000>;
  106. };
  107. art: partition@ff0000 {
  108. label = "art";
  109. reg = <0xff0000 0x010000>;
  110. read-only;
  111. };
  112. };
  113. };
  114. };
  115. &mdio0 {
  116. status = "okay";
  117. phy-mask = <0>;
  118. phy0: ethernet-phy@0 {
  119. reg = <0>;
  120. phy-mode = "sgmii";
  121. qca,ar8327-initvals = <
  122. 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
  123. 0x10 0x81000080 /* POWER_ON_STRIP */
  124. 0x50 0xcc35cc35 /* LED_CTRL0 */
  125. 0x54 0xcb37cb37 /* LED_CTRL1 */
  126. 0x58 0x00000000 /* LED_CTRL2 */
  127. 0x5c 0x00f3cf00 /* LED_CTRL3 */
  128. 0x7c 0x0000007e /* PORT0_STATUS */
  129. >;
  130. };
  131. };
  132. &eth0 {
  133. status = "okay";
  134. pll-data = <0x03000101 0x00000101 0x00001919>;
  135. phy-mode = "sgmii";
  136. phy-handle = <&phy0>;
  137. };
  138. &wmac {
  139. status = "okay";
  140. qca,no-eeprom;
  141. };