qcom-ipq4018-dap-2610.dts 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "D-Link DAP 2610";
  8. compatible = "dlink,dap-2610";
  9. aliases {
  10. led-boot = &led_red;
  11. led-failsafe = &led_red;
  12. led-running = &led_green;
  13. led-upgrade = &led_red;
  14. };
  15. soc {
  16. edma@c080000 {
  17. qcom,num_gmac = <1>;
  18. status = "okay";
  19. };
  20. tcsr@1949000 {
  21. compatible = "qcom,tcsr";
  22. reg = <0x1949000 0x100>;
  23. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  24. };
  25. ess_tcsr@1953000 {
  26. compatible = "qcom,tcsr";
  27. reg = <0x1953000 0x1000>;
  28. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  29. };
  30. tcsr@1957000 {
  31. compatible = "qcom,tcsr";
  32. reg = <0x1957000 0x100>;
  33. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  34. };
  35. rng@22000 {
  36. status = "okay";
  37. };
  38. crypto@8e3a000 {
  39. status = "okay";
  40. };
  41. watchdog@b017000 {
  42. status = "okay";
  43. };
  44. ess-switch@c000000 {
  45. status = "okay";
  46. switch_lan_bmp = <0x20>;
  47. switch_wan_bmp = <0x00>;
  48. };
  49. ess-psgmii@98000 {
  50. status = "okay";
  51. };
  52. };
  53. leds {
  54. compatible = "gpio-leds";
  55. led_red: red {
  56. label = "red:power";
  57. gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
  58. };
  59. led_green: green {
  60. label = "green:power";
  61. gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  62. };
  63. };
  64. keys {
  65. compatible = "gpio-keys";
  66. reset {
  67. label = "reset";
  68. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  69. linux,code = <KEY_RESTART>;
  70. };
  71. };
  72. };
  73. &blsp1_spi1 {
  74. pinctrl-0 = <&spi_0_pins>;
  75. pinctrl-names = "default";
  76. status = "okay";
  77. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  78. flash@0 {
  79. compatible = "jedec,spi-nor";
  80. reg = <0>;
  81. spi-max-frequency = <24000000>;
  82. partitions {
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. compatible = "fixed-partitions";
  86. partition@0 {
  87. label = "SBL1";
  88. reg = <0x0 0x40000>;
  89. read-only;
  90. };
  91. partition@40000 {
  92. label = "MIBIB";
  93. reg = <0x40000 0x20000>;
  94. read-only;
  95. };
  96. partition@60000 {
  97. label = "QSEE";
  98. reg = <0x60000 0x60000>;
  99. read-only;
  100. };
  101. partition@c0000 {
  102. label = "CDT";
  103. reg = <0xc0000 0x10000>;
  104. read-only;
  105. };
  106. partition@d0000 {
  107. label = "DDRPARAMS";
  108. reg = <0xd0000 0x10000>;
  109. read-only;
  110. };
  111. partition@e0000 {
  112. label = "APPSBLENV";
  113. reg = <0xe0000 0x10000>;
  114. read-only;
  115. };
  116. partition@f0000 {
  117. label = "APPSBL";
  118. reg = <0xf0000 0x80000>;
  119. read-only;
  120. };
  121. partition@170000 {
  122. label = "ART";
  123. reg = <0x170000 0x10000>;
  124. read-only;
  125. };
  126. partition@180000 {
  127. compatible = "wrg";
  128. label = "firmware";
  129. reg = <0x180000 0xdc0000>;
  130. };
  131. partition@fb0000 {
  132. label = "rgbd";
  133. reg = <0xfb0000 0x10000>;
  134. read-only;
  135. };
  136. partition@fc0000 {
  137. label = "bdcfg";
  138. reg = <0xfc0000 0x10000>;
  139. read-only;
  140. };
  141. partition@fd0000 {
  142. label = "langpack";
  143. reg = <0xfd0000 0x20000>;
  144. read-only;
  145. };
  146. partition@ff0000 {
  147. label = "certificate";
  148. reg = <0xff0000 0x10000>;
  149. read-only;
  150. };
  151. partition@f40000 {
  152. label = "captival";
  153. reg = <0xf40000 0x70000>;
  154. read-only;
  155. };
  156. };
  157. };
  158. };
  159. &blsp_dma {
  160. status = "okay";
  161. };
  162. &blsp1_uart1 {
  163. pinctrl-0 = <&serial_pins>;
  164. pinctrl-names = "default";
  165. status = "okay";
  166. };
  167. &cryptobam {
  168. status = "okay";
  169. };
  170. &gmac0 {
  171. qcom,phy_mdio_addr = <4>;
  172. qcom,poll_required = <1>;
  173. qcom,forced_speed = <1000>;
  174. qcom,forced_duplex = <1>;
  175. vlan_tag = <1 0x20>;
  176. };
  177. &mdio {
  178. status = "okay";
  179. };
  180. &tlmm {
  181. serial_pins: serial_pinmux {
  182. mux {
  183. pins = "gpio60", "gpio61";
  184. function = "blsp_uart0";
  185. bias-disable;
  186. };
  187. };
  188. spi_0_pins: spi_0_pinmux {
  189. mux {
  190. function = "blsp_spi0";
  191. pins = "gpio55", "gpio56", "gpio57";
  192. drive-strength = <12>;
  193. bias-disable;
  194. };
  195. mux_cs {
  196. function = "gpio";
  197. pins = "gpio54";
  198. drive-strength = <2>;
  199. bias-disable;
  200. output-high;
  201. };
  202. };
  203. };
  204. &wifi0 {
  205. status = "okay";
  206. qcom,ath10k-calibration-variant = "dlink,dap-2610";
  207. };
  208. &wifi1 {
  209. status = "okay";
  210. qcom,ath10k-calibration-variant = "dlink,dap-2610";
  211. };