qcom-ipq4018-emd1.dts 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "EnGenius EMD1";
  8. compatible = "engenius,emd1";
  9. aliases {
  10. led-boot = &led_power;
  11. led-failsafe = &led_power;
  12. led-running = &led_power;
  13. led-upgrade = &led_power;
  14. };
  15. soc {
  16. rng@22000 {
  17. status = "okay";
  18. };
  19. mdio@90000 {
  20. status = "okay";
  21. };
  22. ess-psgmii@98000 {
  23. status = "okay";
  24. };
  25. tcsr@1949000 {
  26. compatible = "qcom,tcsr";
  27. reg = <0x1949000 0x100>;
  28. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  29. };
  30. ess_tcsr@1953000 {
  31. compatible = "qcom,tcsr";
  32. reg = <0x1953000 0x1000>;
  33. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  34. };
  35. tcsr@1957000 {
  36. compatible = "qcom,tcsr";
  37. reg = <0x1957000 0x100>;
  38. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  39. };
  40. crypto@8e3a000 {
  41. status = "okay";
  42. };
  43. watchdog@b017000 {
  44. status = "okay";
  45. };
  46. ess-switch@c000000 {
  47. status = "okay";
  48. switch_lan_bmp = <0x20>;
  49. switch_wan_bmp = <0x00>;
  50. };
  51. edma@c080000 {
  52. status = "okay";
  53. qcom,num_gmac = <1>;
  54. };
  55. };
  56. keys {
  57. compatible = "gpio-keys";
  58. reset {
  59. label = "reset";
  60. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  61. linux,code = <KEY_RESTART>;
  62. };
  63. };
  64. leds {
  65. compatible = "gpio-leds";
  66. led_power: power {
  67. label = "white:power";
  68. gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
  69. };
  70. wlan2g {
  71. label = "red:wlan2g";
  72. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  73. linux,default-trigger = "phy0tpt";
  74. };
  75. wlan5g {
  76. label = "blue:wlan5g";
  77. gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  78. linux,default-trigger = "phy1tpt";
  79. };
  80. mesh {
  81. label = "orange:mesh";
  82. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  83. };
  84. };
  85. };
  86. &tlmm {
  87. serial_pins: serial_pinmux {
  88. mux {
  89. pins = "gpio60", "gpio61";
  90. function = "blsp_uart0";
  91. bias-disable;
  92. };
  93. };
  94. spi_0_pins: spi_0_pinmux {
  95. pin {
  96. function = "blsp_spi0";
  97. pins = "gpio54", "gpio55", "gpio56", "gpio57";
  98. drive-strength = <12>;
  99. bias-disable;
  100. };
  101. pin_cs {
  102. function = "gpio";
  103. pins = "gpio54";
  104. drive-strength = <2>;
  105. bias-disable;
  106. output-high;
  107. };
  108. };
  109. };
  110. &blsp_dma {
  111. status = "okay";
  112. };
  113. &blsp1_spi1 {
  114. pinctrl-0 = <&spi_0_pins>;
  115. pinctrl-names = "default";
  116. status = "okay";
  117. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  118. flash@0 {
  119. compatible = "jedec,spi-nor";
  120. reg = <0>;
  121. spi-max-frequency = <24000000>;
  122. partitions {
  123. compatible = "fixed-partitions";
  124. #address-cells = <1>;
  125. #size-cells = <1>;
  126. partition0@0 {
  127. label = "0:SBL1";
  128. reg = <0x00000000 0x00040000>;
  129. read-only;
  130. };
  131. partition1@40000 {
  132. label = "0:MIBIB";
  133. reg = <0x00040000 0x00020000>;
  134. read-only;
  135. };
  136. partition2@60000 {
  137. label = "0:QSEE";
  138. reg = <0x00060000 0x00060000>;
  139. read-only;
  140. };
  141. partition3@c0000 {
  142. label = "0:CDT";
  143. reg = <0x000c0000 0x00010000>;
  144. read-only;
  145. };
  146. partition4@d0000 {
  147. label = "0:DDRPARAMS";
  148. reg = <0x000d0000 0x00010000>;
  149. read-only;
  150. };
  151. partition5@e0000 {
  152. label = "0:APPSBLENV";
  153. reg = <0x000e0000 0x00010000>;
  154. read-only;
  155. };
  156. partition6@f0000 {
  157. label = "0:APPSBL";
  158. reg = <0x000f0000 0x00080000>;
  159. read-only;
  160. };
  161. partition7@170000 {
  162. label = "0:ART";
  163. reg = <0x00170000 0x00010000>;
  164. read-only;
  165. };
  166. partition8@180000 {
  167. label = "userconfig";
  168. reg = <0x00180000 0x00080000>;
  169. read-only;
  170. };
  171. partition9@200000 {
  172. compatible = "denx,fit";
  173. label = "firmware";
  174. reg = <0x200000 0x01e00000>;
  175. };
  176. };
  177. };
  178. };
  179. &blsp1_uart1 {
  180. pinctrl-0 = <&serial_pins>;
  181. pinctrl-names = "default";
  182. status = "okay";
  183. };
  184. &gmac0 {
  185. qcom,phy_mdio_addr = <4>;
  186. qcom,poll_required = <1>;
  187. qcom,forced_speed = <1000>;
  188. qcom,forced_duplex = <1>;
  189. vlan_tag = <1 0x20>;
  190. };
  191. &cryptobam {
  192. status = "okay";
  193. };
  194. &wifi0 {
  195. status = "okay";
  196. qcom,ath10k-calibration-variant = "EnGenius-EMD1";
  197. };
  198. &wifi1 {
  199. status = "okay";
  200. qcom,ath10k-calibration-variant = "EnGenius-EMD1";
  201. };