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- From ff759cc25db31bbb3469abb16a0306f110c4c7fa Mon Sep 17 00:00:00 2001
- From: Jonas Gorski <[email protected]>
- Date: Thu, 10 Sep 2015 14:52:32 +0200
- Subject: [PATCH 2/3] dt-bindings: spi: document bcm63xx HS SPI devicetree
- bindings
- Add documentation for the bindings of the high speed SPI controller found
- on newer bcm63xx SoCs.
- Signed-off-by: Jonas Gorski <[email protected]>
- ---
- .../devicetree/bindings/spi/spi-bcm63xx-hsspi.txt | 33 ++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
- --- /dev/null
- +++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt
- @@ -0,0 +1,33 @@
- +Binding for Broadcom BCM6328 High Speed SPI controller
- +
- +Required properties:
- +- compatible: must contain of "brcm,bcm6328-hsspi".
- +- reg: Base address and size of the controllers memory area.
- +- interrupts: Interrupt for the SPI block.
- +- clocks: phandles of the SPI clock and the PLL clock.
- +- clock-names: must be "hsspi", "pll".
- +- #address-cells: <1>, as required by generic SPI binding.
- +- #size-cells: <0>, also as required by generic SPI binding.
- +
- +Optional properties:
- +- num-cs: some controllers have less than 8 cs signals. Defaults to 8
- + if absent.
- +
- +Child nodes as per the generic SPI binding.
- +
- +Example:
- +
- + spi@10001000 {
- + compatible = "brcm,bcm6328-hsspi";
- + reg = <0x10001000 0x600>;
- +
- + interrupts = <29>;
- +
- + clocks = <&clkctl 9>, <&hsspi_pll>;
- + clock-names = "hsspi", "pll";
- +
- + num-cs = <2>;
- +
- + #address-cells = <1>;
- + #size-cells = <0>;
- + };
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