001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch 2.8 KB

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  1. From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <[email protected]>
  3. Date: Sun, 26 Feb 2017 11:59:52 +0100
  4. Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks
  5. Make the secondary switch clocks their own clocks. This allows proper
  6. enable reference counting between SAR/XTM and the main switch clocks,
  7. and controlling them individually from drivers.
  8. Signed-off-by: Jonas Gorski <[email protected]>
  9. ---
  10. arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++--------
  11. 1 file changed, 51 insertions(+), 10 deletions(-)
  12. --- a/arch/mips/bcm63xx/clk.c
  13. +++ b/arch/mips/bcm63xx/clk.c
  14. @@ -121,21 +121,56 @@ static struct clk clk_ephy = {
  15. };
  16. /*
  17. + * Ethernet switch SAR clock
  18. + */
  19. +static void swpkt_sar_set(struct clk *clk, int enable)
  20. +{
  21. + if (BCMCPU_IS_6368())
  22. + bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
  23. + else
  24. + return;
  25. +}
  26. +
  27. +static struct clk clk_swpkt_sar = {
  28. + .set = swpkt_sar_set,
  29. +};
  30. +
  31. +/*
  32. + * Ethernet switch USB clock
  33. + */
  34. +static void swpkt_usb_set(struct clk *clk, int enable)
  35. +{
  36. + if (BCMCPU_IS_6368())
  37. + bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
  38. + else
  39. + return;
  40. +}
  41. +
  42. +static struct clk clk_swpkt_usb = {
  43. + .set = swpkt_usb_set,
  44. +};
  45. +
  46. +/*
  47. * Ethernet switch clock
  48. */
  49. static void enetsw_set(struct clk *clk, int enable)
  50. {
  51. - if (BCMCPU_IS_6328())
  52. + if (BCMCPU_IS_6328()) {
  53. bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
  54. - else if (BCMCPU_IS_6362())
  55. + } else if (BCMCPU_IS_6362()) {
  56. bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
  57. - else if (BCMCPU_IS_6368())
  58. - bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
  59. - CKCTL_6368_SWPKT_USB_EN |
  60. - CKCTL_6368_SWPKT_SAR_EN,
  61. - enable);
  62. - else
  63. + } else if (BCMCPU_IS_6368()) {
  64. + if (enable) {
  65. + clk_enable_unlocked(&clk_swpkt_sar);
  66. + clk_enable_unlocked(&clk_swpkt_usb);
  67. + } else {
  68. + clk_disable_unlocked(&clk_swpkt_usb);
  69. + clk_disable_unlocked(&clk_swpkt_sar);
  70. + }
  71. + bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
  72. + } else {
  73. return;
  74. + }
  75. if (enable) {
  76. /* reset switch core afer clock change */
  77. @@ -260,8 +295,12 @@ static void xtm_set(struct clk *clk, int
  78. if (!BCMCPU_IS_6368())
  79. return;
  80. - bcm_hwclock_set(CKCTL_6368_SAR_EN |
  81. - CKCTL_6368_SWPKT_SAR_EN, enable);
  82. + if (enable)
  83. + clk_enable_unlocked(&clk_swpkt_sar);
  84. + else
  85. + clk_disable_unlocked(&clk_swpkt_sar);
  86. +
  87. + bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
  88. if (enable) {
  89. /* reset sar core afer clock change */
  90. @@ -447,6 +486,8 @@ static struct clk_lookup bcm6358_clks[]
  91. CLKDEV_INIT(NULL, "usbd", &clk_usbd),
  92. CLKDEV_INIT(NULL, "spi", &clk_spi),
  93. CLKDEV_INIT(NULL, "pcm", &clk_pcm),
  94. + CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
  95. + CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
  96. CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
  97. CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
  98. };