001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch 1.1 KB

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  1. From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <[email protected]>
  3. Date: Sat, 30 Sep 2017 14:10:18 +0200
  4. Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on
  5. BCM6345
  6. The DMA controller regs actually point to DMA channel 0, so the write to
  7. ENETDMA_CFG_REG will actually modify a random DMA channel.
  8. Since DMA controller registers do not exist on BCM6345, guard the write
  9. with the usual check for dma_has_sram.
  10. Signed-off-by: Jonas Gorski <[email protected]>
  11. ---
  12. drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++-
  13. 1 file changed, 2 insertions(+), 1 deletion(-)
  14. --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
  15. +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
  16. @@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_devi
  17. val = enet_readl(priv, ENET_CTL_REG);
  18. val |= ENET_CTL_ENABLE_MASK;
  19. enet_writel(priv, val, ENET_CTL_REG);
  20. - enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
  21. + if (priv->dma_has_sram)
  22. + enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
  23. enet_dmac_writel(priv, priv->dma_chan_en_mask,
  24. ENETDMAC_CHANCFG, priv->rx_chan);