807-v6.5-05-net-dsa-mv88e6xxx-pass-mv88e6xxx_chip-structure-to-p.patch 4.1 KB

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  1. From cef945452c8468efce75ba0dc8420510a5b84af9 Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <[email protected]>
  3. Date: Mon, 29 May 2023 10:02:45 +0200
  4. Subject: [PATCH 5/6] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
  5. port_max_speed_mode
  6. MIME-Version: 1.0
  7. Content-Type: text/plain; charset=UTF-8
  8. Content-Transfer-Encoding: 8bit
  9. Some switches families have minor differences on supported link speed for
  10. ports. Instead of redefining a new port_max_speed_mode for each different
  11. configuration, allow to pass mv88e6xxx_chip structure to allow
  12. differentiating those chips by known chip id
  13. Signed-off-by: Alexis Lothoré <[email protected]>
  14. Reviewed-by: Florian Fainelli <[email protected]>
  15. Signed-off-by: Jakub Kicinski <[email protected]>
  16. ---
  17. drivers/net/dsa/mv88e6xxx/chip.c | 2 +-
  18. drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
  19. drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
  20. drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
  21. 4 files changed, 19 insertions(+), 10 deletions(-)
  22. --- a/drivers/net/dsa/mv88e6xxx/chip.c
  23. +++ b/drivers/net/dsa/mv88e6xxx/chip.c
  24. @@ -3328,7 +3328,7 @@ static int mv88e6xxx_setup_port(struct m
  25. caps = pl_config.mac_capabilities;
  26. if (chip->info->ops->port_max_speed_mode)
  27. - mode = chip->info->ops->port_max_speed_mode(port);
  28. + mode = chip->info->ops->port_max_speed_mode(chip, port);
  29. else
  30. mode = PHY_INTERFACE_MODE_NA;
  31. --- a/drivers/net/dsa/mv88e6xxx/chip.h
  32. +++ b/drivers/net/dsa/mv88e6xxx/chip.h
  33. @@ -508,7 +508,8 @@ struct mv88e6xxx_ops {
  34. int speed, int duplex);
  35. /* What interface mode should be used for maximum speed? */
  36. - phy_interface_t (*port_max_speed_mode)(int port);
  37. + phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
  38. + int port);
  39. int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
  40. --- a/drivers/net/dsa/mv88e6xxx/port.c
  41. +++ b/drivers/net/dsa/mv88e6xxx/port.c
  42. @@ -342,7 +342,8 @@ int mv88e6341_port_set_speed_duplex(stru
  43. duplex);
  44. }
  45. -phy_interface_t mv88e6341_port_max_speed_mode(int port)
  46. +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  47. + int port)
  48. {
  49. if (port == 5)
  50. return PHY_INTERFACE_MODE_2500BASEX;
  51. @@ -381,7 +382,8 @@ int mv88e6390_port_set_speed_duplex(stru
  52. duplex);
  53. }
  54. -phy_interface_t mv88e6390_port_max_speed_mode(int port)
  55. +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  56. + int port)
  57. {
  58. if (port == 9 || port == 10)
  59. return PHY_INTERFACE_MODE_2500BASEX;
  60. @@ -403,7 +405,8 @@ int mv88e6390x_port_set_speed_duplex(str
  61. duplex);
  62. }
  63. -phy_interface_t mv88e6390x_port_max_speed_mode(int port)
  64. +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  65. + int port)
  66. {
  67. if (port == 9 || port == 10)
  68. return PHY_INTERFACE_MODE_XAUI;
  69. @@ -500,7 +503,8 @@ int mv88e6393x_port_set_speed_duplex(str
  70. return 0;
  71. }
  72. -phy_interface_t mv88e6393x_port_max_speed_mode(int port)
  73. +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  74. + int port)
  75. {
  76. if (port == 0 || port == 9 || port == 10)
  77. return PHY_INTERFACE_MODE_10GBASER;
  78. --- a/drivers/net/dsa/mv88e6xxx/port.h
  79. +++ b/drivers/net/dsa/mv88e6xxx/port.h
  80. @@ -359,10 +359,14 @@ int mv88e6390x_port_set_speed_duplex(str
  81. int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
  82. int speed, int duplex);
  83. -phy_interface_t mv88e6341_port_max_speed_mode(int port);
  84. -phy_interface_t mv88e6390_port_max_speed_mode(int port);
  85. -phy_interface_t mv88e6390x_port_max_speed_mode(int port);
  86. -phy_interface_t mv88e6393x_port_max_speed_mode(int port);
  87. +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  88. + int port);
  89. +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  90. + int port);
  91. +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  92. + int port);
  93. +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  94. + int port);
  95. int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);