801-audio-0073-MLK-21957-3-ASoC-fsl_sai-add-bitcount-and-timestamp-.patch 5.3 KB

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  1. From 599235bd9d22c8cad90b0a7621b46d70cca94d31 Mon Sep 17 00:00:00 2001
  2. From: Viorel Suman <[email protected]>
  3. Date: Wed, 5 Jun 2019 13:46:32 +0000
  4. Subject: [PATCH] MLK-21957-3: ASoC: fsl_sai: add bitcount and timestamp
  5. controls
  6. Bitcount and timestamp support added in SAI IP recently.
  7. Add the related controls in SAI driver.
  8. Signed-off-by: Viorel Suman <[email protected]>
  9. ---
  10. sound/soc/fsl/fsl_sai.c | 97 ++++++++++++++++++++++++++++++++++++++++++++++++-
  11. sound/soc/fsl/fsl_sai.h | 6 +++
  12. 2 files changed, 102 insertions(+), 1 deletion(-)
  13. --- a/sound/soc/fsl/fsl_sai.c
  14. +++ b/sound/soc/fsl/fsl_sai.c
  15. @@ -992,6 +992,90 @@ static const struct snd_soc_dai_ops fsl_
  16. .shutdown = fsl_sai_shutdown,
  17. };
  18. +static const char
  19. + *en_sl[] = { "Disabled", "Enabled", },
  20. + *inc_sl[] = { "On enabled and bitcount increment", "On enabled", };
  21. +
  22. +static const struct soc_enum tstmp_enum[] = {
  23. +SOC_ENUM_SINGLE(FSL_SAI_TTCTL, 0, ARRAY_SIZE(en_sl), en_sl),
  24. +SOC_ENUM_SINGLE(FSL_SAI_RTCTL, 0, ARRAY_SIZE(en_sl), en_sl),
  25. +SOC_ENUM_SINGLE(FSL_SAI_TTCTL, 1, ARRAY_SIZE(inc_sl), inc_sl),
  26. +SOC_ENUM_SINGLE(FSL_SAI_RTCTL, 1, ARRAY_SIZE(inc_sl), inc_sl),
  27. +};
  28. +
  29. +int fsl_sai_get_reg(struct snd_kcontrol *kcontrol,
  30. + struct snd_ctl_elem_value *ucontrol)
  31. +{
  32. + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  33. + struct soc_mreg_control *mc =
  34. + (struct soc_mreg_control *)kcontrol->private_value;
  35. + bool pm_active = pm_runtime_active(component->dev);
  36. + unsigned int regval;
  37. + int ret;
  38. +
  39. + if (pm_active)
  40. + regcache_cache_bypass(component->regmap, true);
  41. +
  42. + ret = snd_soc_component_read(component, mc->regbase, &regval);
  43. +
  44. + if (pm_active)
  45. + regcache_cache_bypass(component->regmap, false);
  46. +
  47. + if (ret < 0)
  48. + return ret;
  49. +
  50. + ucontrol->value.integer.value[0] = regval;
  51. +
  52. + return 0;
  53. +}
  54. +
  55. +#define SOC_SINGLE_REG_RO(xname, xreg) \
  56. +{ .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = (xname), \
  57. + .access = SNDRV_CTL_ELEM_ACCESS_READ | \
  58. + SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
  59. + .info = snd_soc_info_xr_sx, .get = fsl_sai_get_reg, \
  60. + .private_value = (unsigned long)&(struct soc_mreg_control) \
  61. + { .regbase = xreg, .regcount = 1, .nbits = 32, \
  62. + .invert = 0, .min = 0, .max = 0xffffffff, } }
  63. +
  64. +static const struct snd_kcontrol_new fsl_sai_pb_ctrls[] = {
  65. + SOC_ENUM("Playback Timestamp Control", tstmp_enum[0]),
  66. + SOC_ENUM("Playback Timestamp Increment", tstmp_enum[2]),
  67. + SOC_SINGLE("Playback Timestamp Reset", FSL_SAI_TTCTL, 8, 1, 0),
  68. + SOC_SINGLE("Playback Bit Counter Reset", FSL_SAI_TTCTL, 9, 1, 0),
  69. + SOC_SINGLE_REG_RO("Playback Timestamp Counter", FSL_SAI_TTCTN),
  70. + SOC_SINGLE_REG_RO("Playback Bit Counter", FSL_SAI_TBCTN),
  71. + SOC_SINGLE_REG_RO("Playback Latched Timestamp Counter", FSL_SAI_TTCAP),
  72. +};
  73. +
  74. +static const struct snd_kcontrol_new fsl_sai_cp_ctrls[] = {
  75. + SOC_ENUM("Capture Timestamp Control", tstmp_enum[1]),
  76. + SOC_ENUM("Capture Timestamp Increment", tstmp_enum[3]),
  77. + SOC_SINGLE("Capture Timestamp Reset", FSL_SAI_RTCTL, 8, 1, 0),
  78. + SOC_SINGLE("Capture Bit Counter Reset", FSL_SAI_RTCTL, 9, 1, 0),
  79. + SOC_SINGLE_REG_RO("Capture Timestamp Counter", FSL_SAI_RTCTN),
  80. + SOC_SINGLE_REG_RO("Capture Bit Counter", FSL_SAI_RBCTN),
  81. + SOC_SINGLE_REG_RO("Capture Latched Timestamp Counter", FSL_SAI_RTCAP),
  82. +};
  83. +
  84. +static int fsl_sai_pcm_new(struct snd_soc_pcm_runtime *rtd,
  85. + struct snd_soc_dai *dai)
  86. +{
  87. + struct fsl_sai *sai = dev_get_drvdata(dai->dev);
  88. + struct snd_pcm *pcm = rtd->pcm;
  89. + bool ts_enabled = sai->verid.timestamp_en;
  90. + struct snd_soc_component *comp = dai->component;
  91. +
  92. + if (ts_enabled && pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
  93. + snd_soc_add_component_controls(comp, fsl_sai_pb_ctrls,
  94. + ARRAY_SIZE(fsl_sai_pb_ctrls));
  95. +
  96. + if (ts_enabled && pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream)
  97. + snd_soc_add_component_controls(comp, fsl_sai_cp_ctrls,
  98. + ARRAY_SIZE(fsl_sai_cp_ctrls));
  99. + return 0;
  100. +}
  101. +
  102. static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
  103. {
  104. struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
  105. @@ -1030,6 +1114,7 @@ static int fsl_sai_dai_resume(struct snd
  106. }
  107. static struct snd_soc_dai_driver fsl_sai_dai_template = {
  108. + .pcm_new = fsl_sai_pcm_new,
  109. .probe = fsl_sai_dai_probe,
  110. .playback = {
  111. .stream_name = "CPU-Playback",
  112. @@ -1054,7 +1139,7 @@ static struct snd_soc_dai_driver fsl_sai
  113. };
  114. static const struct snd_soc_component_driver fsl_component = {
  115. - .name = "fsl-sai",
  116. + .name = "fsl-sai",
  117. };
  118. static struct reg_default fsl_sai_v2_reg_defaults[] = {
  119. @@ -1141,6 +1226,14 @@ static bool fsl_sai_readable_reg(struct
  120. case FSL_SAI_MDIV:
  121. case FSL_SAI_VERID:
  122. case FSL_SAI_PARAM:
  123. + case FSL_SAI_TTCTN:
  124. + case FSL_SAI_RTCTN:
  125. + case FSL_SAI_TTCTL:
  126. + case FSL_SAI_TBCTN:
  127. + case FSL_SAI_TTCAP:
  128. + case FSL_SAI_RTCTL:
  129. + case FSL_SAI_RBCTN:
  130. + case FSL_SAI_RTCAP:
  131. return true;
  132. default:
  133. return false;
  134. @@ -1214,6 +1307,8 @@ static bool fsl_sai_writeable_reg(struct
  135. case FSL_SAI_RMR:
  136. case FSL_SAI_MCTL:
  137. case FSL_SAI_MDIV:
  138. + case FSL_SAI_TTCTL:
  139. + case FSL_SAI_RTCTL:
  140. return true;
  141. default:
  142. return false;
  143. --- a/sound/soc/fsl/fsl_sai.h
  144. +++ b/sound/soc/fsl/fsl_sai.h
  145. @@ -210,6 +210,12 @@
  146. #define SAI_FLAG_PMQOS BIT(0)
  147. +/* SAI timestamp and bitcounter */
  148. +#define FSL_SAI_xTCTL_TSEN BIT(0)
  149. +#define FSL_SAI_xTCTL_TSINC BIT(1)
  150. +#define FSL_SAI_xTCTL_RTSC BIT(8)
  151. +#define FSL_SAI_xTCTL_RBC BIT(9)
  152. +
  153. struct fsl_sai_soc_data {
  154. unsigned int fifo_depth;
  155. unsigned int fifos;