TDW89X0.dtsi 5.3 KB

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  1. #include "vr9.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. #include <dt-bindings/mips/lantiq_rcu_gphy.h>
  4. / {
  5. compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
  6. chosen {
  7. bootargs = "console=ttyLTQ0,115200";
  8. };
  9. aliases {
  10. /* the power led can't be controlled, use the wps led instead */
  11. led-boot = &wps;
  12. led-failsafe = &wps;
  13. led-dsl = &dsl;
  14. led-internet = &internet;
  15. led-wifi = &wifi;
  16. led-usb = &led_usb0;
  17. led-usb2 = &led_usb2;
  18. };
  19. memory@0 {
  20. reg = <0x0 0x4000000>;
  21. };
  22. gpio-keys-polled {
  23. compatible = "gpio-keys-polled";
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. poll-interval = <100>;
  27. reset {
  28. label = "reset";
  29. gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  30. linux,code = <KEY_RESTART>;
  31. };
  32. wifi {
  33. label = "wifi";
  34. gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  35. linux,code = <KEY_RFKILL>;
  36. linux,input-type = <EV_SW>;
  37. };
  38. wps {
  39. label = "wps";
  40. gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  41. linux,code = <KEY_WPS_BUTTON>;
  42. };
  43. };
  44. gpio-leds {
  45. compatible = "gpio-leds";
  46. /*
  47. power is not controllable via gpio
  48. */
  49. dsl: dsl {
  50. label = "tdw89x0:green:dsl";
  51. gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  52. };
  53. internet: internet {
  54. label = "tdw89x0:green:internet";
  55. gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  56. };
  57. led_usb0: usb0 {
  58. label = "tdw89x0:green:usb";
  59. gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  60. };
  61. led_usb2: usb2 {
  62. label = "tdw89x0:green:usb2";
  63. gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  64. };
  65. wps: wps {
  66. label = "tdw89x0:green:wps";
  67. gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  68. };
  69. };
  70. wifi-leds {
  71. compatible = "gpio-leds";
  72. wifi: wifi {
  73. label = "tdw89x0:green:wifi";
  74. gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  75. linux,default-trigger = "phy0tpt";
  76. };
  77. };
  78. usb_vbus: regulator-usb-vbus {
  79. compatible = "regulator-fixed";
  80. regulator-name = "USB_VBUS";
  81. regulator-min-microvolt = <5000000>;
  82. regulator-max-microvolt = <5000000>;
  83. gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  84. enable-active-high;
  85. };
  86. };
  87. &eth0 {
  88. lan: interface@0 {
  89. compatible = "lantiq,xrx200-pdi";
  90. #address-cells = <1>;
  91. #size-cells = <0>;
  92. reg = <0>;
  93. mtd-mac-address = <&ath9k_cal 0xf100>;
  94. lantiq,switch;
  95. ethernet@0 {
  96. compatible = "lantiq,xrx200-pdi-port";
  97. reg = <0>;
  98. phy-mode = "rgmii";
  99. phy-handle = <&phy0>;
  100. // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
  101. };
  102. ethernet@5 {
  103. compatible = "lantiq,xrx200-pdi-port";
  104. reg = <5>;
  105. phy-mode = "rgmii";
  106. phy-handle = <&phy5>;
  107. };
  108. ethernet@2 {
  109. compatible = "lantiq,xrx200-pdi-port";
  110. reg = <2>;
  111. phy-mode = "gmii";
  112. phy-handle = <&phy11>;
  113. };
  114. ethernet@3 {
  115. compatible = "lantiq,xrx200-pdi-port";
  116. reg = <4>;
  117. phy-mode = "gmii";
  118. phy-handle = <&phy13>;
  119. };
  120. };
  121. mdio@0 {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. compatible = "lantiq,xrx200-mdio";
  125. reg = <0>;
  126. phy0: ethernet-phy@0 {
  127. reg = <0x0>;
  128. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  129. };
  130. phy5: ethernet-phy@5 {
  131. reg = <0x5>;
  132. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  133. };
  134. phy11: ethernet-phy@11 {
  135. reg = <0x11>;
  136. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  137. };
  138. phy13: ethernet-phy@13 {
  139. reg = <0x13>;
  140. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  141. };
  142. };
  143. };
  144. &gphy0 {
  145. lantiq,gphy-mode = <GPHY_MODE_GE>;
  146. };
  147. &gphy1 {
  148. lantiq,gphy-mode = <GPHY_MODE_GE>;
  149. };
  150. &gpio {
  151. pinctrl-names = "default";
  152. pinctrl-0 = <&state_default>;
  153. state_default: pinmux {
  154. mdio {
  155. lantiq,groups = "mdio";
  156. lantiq,function = "mdio";
  157. };
  158. gphy-leds {
  159. lantiq,groups = "gphy0 led1", "gphy1 led1";
  160. lantiq,function = "gphy";
  161. lantiq,pull = <2>;
  162. lantiq,open-drain = <0>;
  163. lantiq,output = <1>;
  164. };
  165. phy-rst {
  166. lantiq,pins = "io42";
  167. lantiq,pull = <0>;
  168. lantiq,open-drain = <0>;
  169. lantiq,output = <1>;
  170. };
  171. pcie-rst {
  172. lantiq,pins = "io38";
  173. lantiq,pull = <0>;
  174. lantiq,output = <1>;
  175. };
  176. };
  177. pins_spi_default: pins_spi_default {
  178. spi_in {
  179. lantiq,groups = "spi_di";
  180. lantiq,function = "spi";
  181. };
  182. spi_out {
  183. lantiq,groups = "spi_do", "spi_clk",
  184. "spi_cs4";
  185. lantiq,function = "spi";
  186. lantiq,output = <1>;
  187. };
  188. };
  189. };
  190. &pcie0 {
  191. pcie@0 {
  192. reg = <0 0 0 0 0>;
  193. #interrupt-cells = <1>;
  194. #size-cells = <2>;
  195. #address-cells = <3>;
  196. device_type = "pci";
  197. ath9k: wifi@168c,002e {
  198. compatible = "pci168c,002e";
  199. reg = <0 0 0 0 0>;
  200. #gpio-cells = <2>;
  201. gpio-controller;
  202. qca,no-eeprom;
  203. qca,disable-5ghz;
  204. mtd-mac-address = <&ath9k_cal 0xf100>;
  205. mtd-mac-address-increment = <2>;
  206. };
  207. };
  208. };
  209. &spi {
  210. status = "okay";
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&pins_spi_default>;
  213. m25p80@4 {
  214. #address-cells = <1>;
  215. #size-cells = <1>;
  216. compatible = "jedec,spi-nor";
  217. reg = <4 0>;
  218. spi-max-frequency = <33250000>;
  219. m25p,fast-read;
  220. partitions {
  221. compatible = "fixed-partitions";
  222. #address-cells = <1>;
  223. #size-cells = <1>;
  224. partition@0 {
  225. reg = <0x0 0x20000>;
  226. label = "u-boot";
  227. read-only;
  228. };
  229. partition@20000 {
  230. reg = <0x20000 0x7a0000>;
  231. label = "firmware";
  232. };
  233. partition@7c0000 {
  234. reg = <0x7c0000 0x10000>;
  235. label = "config";
  236. read-only;
  237. };
  238. ath9k_cal: partition@7d0000 {
  239. reg = <0x7d0000 0x30000>;
  240. label = "boardconfig";
  241. read-only;
  242. };
  243. };
  244. };
  245. };
  246. &usb_phy0 {
  247. status = "okay";
  248. };
  249. &usb_phy1 {
  250. status = "okay";
  251. };
  252. &usb0 {
  253. status = "okay";
  254. vbus-supply = <&usb_vbus>;
  255. };
  256. &usb1 {
  257. status = "okay";
  258. vbus-supply = <&usb_vbus>;
  259. };