bcm6358.dtsi 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /dts-v1/;
  3. #include <dt-bindings/clock/bcm6358-clock.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h>
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. #include <dt-bindings/leds/common.h>
  9. #include <dt-bindings/reset/bcm6358-reset.h>
  10. / {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. compatible = "brcm,bcm6358";
  14. aliases {
  15. pflash = &pflash;
  16. pinctrl = &pinctrl;
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. spi0 = &lsspi;
  20. };
  21. chosen {
  22. bootargs = "earlycon";
  23. stdout-path = "serial0:115200n8";
  24. };
  25. clocks {
  26. periph_osc: periph-osc {
  27. compatible = "fixed-clock";
  28. #clock-cells = <0>;
  29. clock-frequency = <50000000>;
  30. clock-output-names = "periph";
  31. };
  32. };
  33. cpus {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. brcm,bmips-cbr-reg = <0xff400000>;
  37. mips-hpt-frequency = <150000000>;
  38. cpu@0 {
  39. compatible = "brcm,bmips4350", "mips,mips4Kc";
  40. device_type = "cpu";
  41. reg = <0>;
  42. };
  43. cpu@1 {
  44. compatible = "brcm,bmips4350", "mips,mips4Kc";
  45. device_type = "cpu";
  46. reg = <1>;
  47. };
  48. };
  49. cpu_intc: interrupt-controller {
  50. #address-cells = <0>;
  51. compatible = "mti,cpu-interrupt-controller";
  52. interrupt-controller;
  53. #interrupt-cells = <1>;
  54. };
  55. memory@0 {
  56. device_type = "memory";
  57. reg = <0 0>;
  58. };
  59. pflash: nor@1e000000 {
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. compatible = "cfi-flash";
  63. reg = <0x1e000000 0x2000000>;
  64. bank-width = <2>;
  65. status = "disabled";
  66. };
  67. ubus {
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. compatible = "simple-bus";
  71. ranges;
  72. periph_clk: clock-controller@fffe0004 {
  73. compatible = "brcm,bcm6358-clocks";
  74. reg = <0xfffe0004 0x4>;
  75. #clock-cells = <1>;
  76. };
  77. pll_cntl: syscon@fffe0008 {
  78. compatible = "syscon", "simple-mfd";
  79. reg = <0xfffe0008 0x4>;
  80. native-endian;
  81. syscon-reboot {
  82. compatible = "syscon-reboot";
  83. offset = <0x0>;
  84. mask = <0x1>;
  85. };
  86. };
  87. periph_intc: interrupt-controller@fffe000c {
  88. #address-cells = <1>;
  89. compatible = "brcm,bcm6345-l1-intc";
  90. reg = <0xfffe000c 0x8>,
  91. <0xfffe0038 0x8>;
  92. interrupt-controller;
  93. #interrupt-cells = <1>;
  94. interrupt-parent = <&cpu_intc>;
  95. interrupts = <2>, <3>;
  96. };
  97. ext_intc0: interrupt-controller@fffe0014 {
  98. #address-cells = <1>;
  99. compatible = "brcm,bcm6345-ext-intc";
  100. reg = <0xfffe0014 0x4>;
  101. interrupt-controller;
  102. #interrupt-cells = <2>;
  103. interrupt-parent = <&periph_intc>;
  104. interrupts = <BCM6358_IRQ_EXT0>,
  105. <BCM6358_IRQ_EXT1>,
  106. <BCM6358_IRQ_EXT2>,
  107. <BCM6358_IRQ_EXT3>;
  108. };
  109. ext_intc1: interrupt-controller@fffe001c {
  110. #address-cells = <1>;
  111. compatible = "brcm,bcm6345-ext-intc";
  112. reg = <0xfffe001c 0x4>;
  113. interrupt-controller;
  114. #interrupt-cells = <2>;
  115. interrupt-parent = <&periph_intc>;
  116. interrupts = <BCM6358_IRQ_EXT4>,
  117. <BCM6358_IRQ_EXT5>;
  118. };
  119. periph_rst: reset-controller@fffe0034 {
  120. compatible = "brcm,bcm6345-reset";
  121. reg = <0xfffe0034 0x4>;
  122. #reset-cells = <1>;
  123. };
  124. wdt: watchdog@fffe005c {
  125. compatible = "brcm,bcm7038-wdt";
  126. reg = <0xfffe005c 0xc>;
  127. clocks = <&periph_osc>;
  128. timeout-sec = <30>;
  129. };
  130. gpio_cntl: syscon@fffe0080 {
  131. #address-cells = <1>;
  132. #size-cells = <1>;
  133. compatible = "brcm,bcm6358-gpio-sysctl",
  134. "syscon", "simple-mfd";
  135. reg = <0xfffe0080 0x50>;
  136. ranges = <0 0xfffe0080 0x80>;
  137. native-endian;
  138. gpio: gpio@0 {
  139. compatible = "brcm,bcm6358-gpio";
  140. reg-names = "dirout", "dat";
  141. reg = <0x0 0x8>, <0x8 0x8>;
  142. gpio-controller;
  143. gpio-ranges = <&pinctrl 0 0 40>;
  144. #gpio-cells = <2>;
  145. };
  146. pinctrl: pinctrl@18 {
  147. compatible = "brcm,bcm6358-pinctrl";
  148. reg = <0x18 0x4>;
  149. pinctrl_ebi_cs: ebi_cs-pins {
  150. function = "ebi_cs";
  151. groups = "ebi_cs_grp";
  152. };
  153. pinctrl_uart1: uart1-pins {
  154. function = "uart1";
  155. groups = "uart1_grp";
  156. };
  157. pinctrl_serial_led: serial_led-pins {
  158. function = "serial_led";
  159. groups = "serial_led_grp";
  160. };
  161. pinctrl_legacy_led: legacy_led-pins {
  162. function = "legacy_led";
  163. groups = "legacy_led_grp";
  164. };
  165. pinctrl_led: led-pins {
  166. function = "led";
  167. groups = "led_grp";
  168. };
  169. pinctrl_spi_cs_23: spi_cs-pins {
  170. function = "spi_cs";
  171. groups = "spi_cs_grp";
  172. };
  173. pinctrl_utopia: utopia-pins {
  174. function = "utopia";
  175. groups = "utopia_grp";
  176. };
  177. pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
  178. function = "pwm_syn_clk";
  179. groups = "pwm_syn_clk_grp";
  180. };
  181. pinctrl_sys_irq: sys_irq-pins {
  182. function = "sys_irq";
  183. groups = "sys_irq_grp";
  184. };
  185. };
  186. };
  187. leds: led-controller@fffe00d0 {
  188. #address-cells = <1>;
  189. #size-cells = <0>;
  190. compatible = "brcm,bcm6358-leds";
  191. reg = <0xfffe00d0 0x8>;
  192. status = "disabled";
  193. };
  194. uart0: serial@fffe0100 {
  195. compatible = "brcm,bcm6345-uart";
  196. reg = <0xfffe0100 0x18>;
  197. interrupt-parent = <&periph_intc>;
  198. interrupts = <BCM6358_IRQ_UART0>;
  199. clocks = <&periph_osc>;
  200. clock-names = "periph";
  201. status = "disabled";
  202. };
  203. uart1: serial@fffe0120 {
  204. compatible = "brcm,bcm6345-uart";
  205. reg = <0xfffe0120 0x18>;
  206. interrupt-parent = <&periph_intc>;
  207. interrupts = <BCM6358_IRQ_UART1>;
  208. clocks = <&periph_osc>;
  209. clock-names = "periph";
  210. status = "disabled";
  211. };
  212. lsspi: spi@fffe0800 {
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. compatible = "brcm,bcm6358-spi";
  216. reg = <0xfffe0800 0x70c>;
  217. interrupt-parent = <&periph_intc>;
  218. interrupts = <BCM6358_IRQ_SPI>;
  219. clocks = <&periph_clk BCM6358_CLK_SPI>;
  220. clock-names = "spi";
  221. resets = <&periph_rst BCM6358_RST_SPI>;
  222. status = "disabled";
  223. };
  224. pci: pci@fffe1000 {
  225. compatible = "brcm,bcm6348-pci";
  226. reg = <0xfffe1000 0x200>;
  227. #address-cells = <3>;
  228. #size-cells = <2>;
  229. device_type = "pci";
  230. bus-range = <0x00 0x01>;
  231. ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
  232. <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
  233. linux,pci-probe-only = <1>;
  234. interrupt-parent = <&periph_intc>;
  235. interrupts = <BCM6358_IRQ_MPI>;
  236. resets = <&periph_rst BCM6358_RST_MPI>;
  237. reset-names = "pci";
  238. brcm,remap;
  239. status = "disabled";
  240. };
  241. ehci: usb@fffe1300 {
  242. compatible = "brcm,bcm6358-ehci", "generic-ehci";
  243. reg = <0xfffe1300 0x100>;
  244. big-endian;
  245. spurious-oc;
  246. interrupt-parent = <&periph_intc>;
  247. interrupts = <BCM6358_IRQ_EHCI>;
  248. phys = <&usbh 0>;
  249. phy-names = "usb";
  250. status = "disabled";
  251. };
  252. ohci: usb@fffe1400 {
  253. compatible = "brcm,bcm6358-ohci", "generic-ohci";
  254. reg = <0xfffe1400 0x100>;
  255. big-endian;
  256. no-big-frame-no;
  257. interrupt-parent = <&periph_intc>;
  258. interrupts = <BCM6358_IRQ_OHCI>;
  259. phys = <&usbh 0>;
  260. phy-names = "usb";
  261. status = "disabled";
  262. };
  263. usbh: usb-phy@fffe1500 {
  264. compatible = "brcm,bcm6358-usbh-phy";
  265. reg = <0xfffe1500 0x38>;
  266. #phy-cells = <1>;
  267. resets = <&periph_rst BCM6358_RST_USBH>;
  268. status = "disabled";
  269. };
  270. ethernet0: ethernet@fffe4000 {
  271. compatible = "brcm,bcm6358-emac";
  272. reg = <0xfffe4000 0x2dc>;
  273. clocks = <&periph_clk BCM6358_CLK_ENET0>;
  274. interrupt-parent = <&periph_intc>;
  275. interrupts = <BCM6358_IRQ_EMAC0>,
  276. <BCM6358_IRQ_EMAC0_RX_DMA>,
  277. <BCM6358_IRQ_EMAC0_TX_DMA>;
  278. interrupt-names = "emac",
  279. "rx",
  280. "tx";
  281. brcm,iudma = <&iudma>;
  282. dma-rx = <0>;
  283. dma-tx = <1>;
  284. status = "disabled";
  285. mdio0: mdio {
  286. #address-cells = <1>;
  287. #size-cells = <0>;
  288. };
  289. };
  290. ethernet1: ethernet@fffe4800 {
  291. compatible = "brcm,bcm6358-emac";
  292. reg = <0xfffe4800 0x2dc>;
  293. clocks = <&periph_clk BCM6358_CLK_ENET1>;
  294. interrupt-parent = <&periph_intc>;
  295. interrupts = <BCM6358_IRQ_EMAC1>,
  296. <BCM6358_IRQ_EMAC1_RX_DMA>,
  297. <BCM6358_IRQ_EMAC1_TX_DMA>;
  298. interrupt-names = "emac",
  299. "rx",
  300. "tx";
  301. brcm,iudma = <&iudma>;
  302. brcm,external-mii;
  303. dma-rx = <2>;
  304. dma-tx = <3>;
  305. status = "disabled";
  306. mdio1: mdio {
  307. #address-cells = <1>;
  308. #size-cells = <0>;
  309. };
  310. };
  311. iudma: dma@fffe5000 {
  312. #address-cells = <1>;
  313. #size-cells = <1>;
  314. compatible = "brcm,bcm6358-iudma";
  315. reg = <0xfffe5000 0x24>,
  316. <0xfffe5100 0x80>,
  317. <0xfffe5200 0x80>;
  318. reg-names = "dma",
  319. "dma-channels",
  320. "dma-sram";
  321. dma-channels = <8>;
  322. clocks = <&periph_clk BCM6358_CLK_EMUSB>,
  323. <&periph_clk BCM6358_CLK_USBSU>,
  324. <&periph_clk BCM6358_CLK_EPHY>,
  325. <&periph_clk BCM6358_CLK_ENET>;
  326. resets = <&periph_rst BCM6358_RST_ENET>,
  327. <&periph_rst BCM6358_RST_EPHY>;
  328. status = "disabled";
  329. };
  330. };
  331. };