rtl931x.dtsi 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include <dt-bindings/interrupt-controller/mips-gic.h>
  3. / {
  4. #address-cells = <1>;
  5. #size-cells = <1>;
  6. compatible = "realtek,rtl838x-soc";
  7. cpus {
  8. #address-cells = <1>;
  9. #size-cells = <0>;
  10. frequency = <1000000000>;
  11. cpu@0 {
  12. compatible = "mti,interaptive";
  13. reg = <0>;
  14. };
  15. cpu@1 {
  16. compatible = "mti,interaptive";
  17. reg = <1>;
  18. };
  19. };
  20. memory@0 {
  21. device_type = "memory";
  22. reg = <0x0 0x10000000>;
  23. };
  24. aliases {
  25. serial0 = &uart0;
  26. serial1 = &uart1;
  27. };
  28. chosen {
  29. bootargs = "earlycon";
  30. stdout-path = "serial0:115200n8";
  31. };
  32. lx_clk: lx_clk {
  33. compatible = "fixed-clock";
  34. #clock-cells = <0>;
  35. clock-frequency = <200000000>;
  36. };
  37. cpuclock: cpuclock@0 {
  38. #clock-cells = <0>;
  39. compatible = "fixed-clock";
  40. /* FIXME: there should be way to detect this */
  41. clock-frequency = <1000000000>;
  42. };
  43. cpuintc: cpuintc {
  44. compatible = "mti,cpu-interrupt-controller";
  45. #address-cells = <0>;
  46. #interrupt-cells = <1>;
  47. interrupt-controller;
  48. };
  49. gic: interrupt-controller@1ddc0000 {
  50. compatible = "mti,gic";
  51. reg = <0x1ddc0000 0x20000>;
  52. interrupt-controller;
  53. #interrupt-cells = <3>;
  54. /*
  55. * Declare the interrupt-parent even though the mti,gic
  56. * binding doesn't require it, such that the kernel can
  57. * figure out that cpu_intc is the root interrupt
  58. * controller & should be probed first.
  59. */
  60. interrupt-parent = <&cpuintc>;
  61. timer {
  62. compatible = "mti,gic-timer";
  63. interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
  64. clocks = <&cpuclock>;
  65. };
  66. };
  67. soc: soc {
  68. compatible = "simple-bus";
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. ranges = <0x0 0x18000000 0x10000>;
  72. spi0: spi@1200 {
  73. status = "okay";
  74. compatible = "realtek,rtl8380-spi";
  75. reg = <0x1200 0x100>;
  76. #address-cells = <1>;
  77. #size-cells = <0>;
  78. };
  79. watchdog0: watchdog@3260 {
  80. compatible = "realtek,rtl9310-wdt";
  81. reg = <0x3260 0xc>;
  82. realtek,reset-mode = "soc";
  83. clocks = <&lx_clk>;
  84. timeout-sec = <30>;
  85. interrupt-parent = <&gic>;
  86. interrupt-names = "phase1", "phase2";
  87. interrupts = <GIC_SHARED 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 9 IRQ_TYPE_LEVEL_HIGH>;
  88. };
  89. gpio0: gpio-controller@3300 {
  90. compatible = "realtek,rtl9310-gpio", "realtek,otto-gpio";
  91. reg = <0x3300 0x1c>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. ngpios = <32>;
  95. interrupt-controller;
  96. #interrupt-cells = <3>;
  97. interrupt-parent = <&gic>;
  98. interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
  99. };
  100. uart0: uart@2000 {
  101. compatible = "ns16550a";
  102. reg = <0x2000 0x100>;
  103. clock-frequency = <200000000>;
  104. interrupt-parent = <&gic>;
  105. #interrupt-cells = <3>;
  106. interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
  107. reg-io-width = <1>;
  108. reg-shift = <2>;
  109. fifo-size = <1>;
  110. no-loopback-test;
  111. };
  112. uart1: uart@2100 {
  113. compatible = "ns16550a";
  114. reg = <0x2100 0x100>;
  115. clock-frequency = <200000000>;
  116. interrupt-parent = <&gic>;
  117. #interrupt-cells = <3>;
  118. interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
  119. reg-io-width = <1>;
  120. reg-shift = <2>;
  121. fifo-size = <1>;
  122. no-loopback-test;
  123. status = "disabled";
  124. };
  125. };
  126. pinmux: pinmux@1b001358 {
  127. compatible = "pinctrl-single";
  128. reg = <0x1b001358 0x4>;
  129. pinctrl-single,bit-per-mux;
  130. pinctrl-single,register-width = <32>;
  131. pinctrl-single,function-mask = <0x1>;
  132. #pinctrl-cells = <2>;
  133. /* Enable GPIO6 and GPIO7, possibly unknown others */
  134. pinmux_disable_jtag: disable_jtag {
  135. pinctrl-single,bits = <0x0 0x0 0x8000>;
  136. };
  137. /* Controls GPIO0 */
  138. pinmux_disable_sys_led: disable_sys_led {
  139. pinctrl-single,bits = <0x0 0x0 0x100>;
  140. };
  141. };
  142. ethernet0: ethernet@1b00a300 {
  143. status = "okay";
  144. compatible = "realtek,rtl838x-eth";
  145. reg = <0x1b00a300 0x100>;
  146. interrupt-parent = <&gic>;
  147. #interrupt-cells = <3>;
  148. interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
  149. phy-mode = "internal";
  150. fixed-link {
  151. speed = <1000>;
  152. full-duplex;
  153. };
  154. };
  155. switch0: switch@1b000000 {
  156. compatible = "realtek,rtl83xx-switch";
  157. status = "okay";
  158. interrupt-parent = <&gic>;
  159. #interrupt-cells = <3>;
  160. interrupts = <GIC_SHARED 15 IRQ_TYPE_LEVEL_HIGH>;
  161. };
  162. };