2
0

053-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6S.patch 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792
  1. From f1b11f43b3e983b26d8010fc43ba6c2b979826f2 Mon Sep 17 00:00:00 2001
  2. From: Muhammed Efe Cetin <[email protected]>
  3. Date: Sat, 30 Dec 2023 14:18:00 +0300
  4. Subject: [PATCH] arm64: dts: rockchip: Add support for NanoPi R6S
  5. Add basic NanoPi R6S support that comes with USB2, PCIe, SD card, eMMC
  6. support.
  7. Signed-off-by: Muhammed Efe Cetin <[email protected]>
  8. Link: https://lore.kernel.org/r/6db3b653efc6f0a2dca8e96fdd0503906db72fb6.1703934548.git.efectn@protonmail.com
  9. Signed-off-by: Heiko Stuebner <[email protected]>
  10. ---
  11. arch/arm64/boot/dts/rockchip/Makefile | 1 +
  12. .../boot/dts/rockchip/rk3588s-nanopi-r6s.dts | 764 ++++++++++++++++++
  13. 2 files changed, 765 insertions(+)
  14. create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
  15. --- a/arch/arm64/boot/dts/rockchip/Makefile
  16. +++ b/arch/arm64/boot/dts/rockchip/Makefile
  17. @@ -109,4 +109,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
  18. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
  19. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
  20. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
  21. +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb
  22. dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
  23. --- /dev/null
  24. +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
  25. @@ -0,0 +1,764 @@
  26. +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  27. +
  28. +/dts-v1/;
  29. +
  30. +#include <dt-bindings/pinctrl/rockchip.h>
  31. +#include <dt-bindings/gpio/gpio.h>
  32. +#include <dt-bindings/input/input.h>
  33. +#include "rk3588s.dtsi"
  34. +
  35. +/ {
  36. + model = "FriendlyElec NanoPi R6S";
  37. + compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s";
  38. +
  39. + aliases {
  40. + ethernet0 = &gmac1;
  41. + mmc0 = &sdmmc;
  42. + mmc1 = &sdhci;
  43. + };
  44. +
  45. + chosen {
  46. + stdout-path = "serial2:1500000n8";
  47. + };
  48. +
  49. + adc-keys {
  50. + compatible = "adc-keys";
  51. + io-channels = <&saradc 0>;
  52. + io-channel-names = "buttons";
  53. + keyup-threshold-microvolt = <1800000>;
  54. + poll-interval = <100>;
  55. +
  56. + button-maskrom {
  57. + label = "Maskrom";
  58. + linux,code = <KEY_VENDOR>;
  59. + press-threshold-microvolt = <1800>;
  60. + };
  61. + };
  62. +
  63. + gpio-keys {
  64. + compatible = "gpio-keys";
  65. + pinctrl-names = "default";
  66. + pinctrl-0 = <&key1_pin>;
  67. +
  68. + button-user {
  69. + label = "User";
  70. + linux,code = <BTN_1>;
  71. + gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
  72. + debounce-interval = <50>;
  73. + };
  74. + };
  75. +
  76. + leds {
  77. + compatible = "gpio-leds";
  78. +
  79. + sys_led: led-0 {
  80. + label = "sys_led";
  81. + gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
  82. + linux,default-trigger = "heartbeat";
  83. + pinctrl-names = "default";
  84. + pinctrl-0 = <&sys_led_pin>;
  85. + };
  86. +
  87. + wan_led: led-1 {
  88. + label = "wan_led";
  89. + gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
  90. + pinctrl-names = "default";
  91. + pinctrl-0 = <&wan_led_pin>;
  92. + };
  93. +
  94. + lan1_led: led-2 {
  95. + label = "lan1_led";
  96. + gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
  97. + pinctrl-names = "default";
  98. + pinctrl-0 = <&lan1_led_pin>;
  99. + };
  100. +
  101. + lan2_led: led-3 {
  102. + label = "lan2_led";
  103. + gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
  104. + pinctrl-names = "default";
  105. + pinctrl-0 = <&lan2_led_pin>;
  106. + };
  107. + };
  108. +
  109. + vcc5v0_sys: vcc5v0-sys-regulator {
  110. + compatible = "regulator-fixed";
  111. + regulator-name = "vcc5v0_sys";
  112. + regulator-always-on;
  113. + regulator-boot-on;
  114. + regulator-min-microvolt = <5000000>;
  115. + regulator-max-microvolt = <5000000>;
  116. + };
  117. +
  118. + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
  119. + compatible = "regulator-fixed";
  120. + regulator-name = "vcc_1v1_nldo_s3";
  121. + regulator-always-on;
  122. + regulator-boot-on;
  123. + regulator-min-microvolt = <1100000>;
  124. + regulator-max-microvolt = <1100000>;
  125. + vin-supply = <&vcc5v0_sys>;
  126. + };
  127. +
  128. + vcc_3v3_s0: vcc-3v3-s0-regulator {
  129. + compatible = "regulator-fixed";
  130. + regulator-always-on;
  131. + regulator-boot-on;
  132. + regulator-min-microvolt = <3300000>;
  133. + regulator-max-microvolt = <3300000>;
  134. + regulator-name = "vcc_3v3_s0";
  135. + vin-supply = <&vcc_3v3_s3>;
  136. + };
  137. +
  138. + vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
  139. + compatible = "regulator-fixed";
  140. + enable-active-high;
  141. + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
  142. + pinctrl-names = "default";
  143. + pinctrl-0 = <&sd_s0_pwr>;
  144. + regulator-name = "vcc_3v3_sd_s0";
  145. + regulator-boot-on;
  146. + regulator-max-microvolt = <3000000>;
  147. + regulator-min-microvolt = <3000000>;
  148. + vin-supply = <&vcc_3v3_s3>;
  149. + };
  150. +
  151. + vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
  152. + compatible = "regulator-fixed";
  153. + regulator-name = "vcc_3v3_pcie20";
  154. + regulator-always-on;
  155. + regulator-boot-on;
  156. + regulator-min-microvolt = <3300000>;
  157. + regulator-max-microvolt = <3300000>;
  158. + vin-supply = <&vcc_3v3_s3>;
  159. + };
  160. +
  161. + vcc5v0_usb: vcc5v0-usb-regulator {
  162. + compatible = "regulator-fixed";
  163. + regulator-name = "vcc5v0_usb";
  164. + regulator-always-on;
  165. + regulator-boot-on;
  166. + regulator-min-microvolt = <5000000>;
  167. + regulator-max-microvolt = <5000000>;
  168. + vin-supply = <&vcc5v0_sys>;
  169. + };
  170. +
  171. + vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator {
  172. + compatible = "regulator-fixed";
  173. + enable-active-high;
  174. + gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
  175. + pinctrl-names = "default";
  176. + pinctrl-0 = <&typec5v_pwren>;
  177. + regulator-name = "vcc5v0_usb_otg0";
  178. + regulator-min-microvolt = <5000000>;
  179. + regulator-max-microvolt = <5000000>;
  180. + vin-supply = <&vcc5v0_usb>;
  181. + };
  182. +
  183. + vcc5v0_host_20: vcc5v0-host-20-regulator {
  184. + compatible = "regulator-fixed";
  185. + enable-active-high;
  186. + gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
  187. + pinctrl-names = "default";
  188. + pinctrl-0 = <&vcc5v0_host20_en>;
  189. + regulator-name = "vcc5v0_host_20";
  190. + regulator-min-microvolt = <5000000>;
  191. + regulator-max-microvolt = <5000000>;
  192. + vin-supply = <&vcc5v0_usb>;
  193. + };
  194. +};
  195. +
  196. +&combphy0_ps {
  197. + status = "okay";
  198. +};
  199. +
  200. +&combphy2_psu {
  201. + status = "okay";
  202. +};
  203. +
  204. +&cpu_b0 {
  205. + cpu-supply = <&vdd_cpu_big0_s0>;
  206. +};
  207. +
  208. +&cpu_b1 {
  209. + cpu-supply = <&vdd_cpu_big0_s0>;
  210. +};
  211. +
  212. +&cpu_b2 {
  213. + cpu-supply = <&vdd_cpu_big1_s0>;
  214. +};
  215. +
  216. +&cpu_b3 {
  217. + cpu-supply = <&vdd_cpu_big1_s0>;
  218. +};
  219. +
  220. +&cpu_l0 {
  221. + cpu-supply = <&vdd_cpu_lit_s0>;
  222. +};
  223. +
  224. +&cpu_l1 {
  225. + cpu-supply = <&vdd_cpu_lit_s0>;
  226. +};
  227. +
  228. +&cpu_l2 {
  229. + cpu-supply = <&vdd_cpu_lit_s0>;
  230. +};
  231. +
  232. +&cpu_l3 {
  233. + cpu-supply = <&vdd_cpu_lit_s0>;
  234. +};
  235. +
  236. +&gmac1 {
  237. + clock_in_out = "output";
  238. + phy-handle = <&rgmii_phy1>;
  239. + phy-mode = "rgmii-rxid";
  240. + pinctrl-0 = <&gmac1_miim
  241. + &gmac1_tx_bus2
  242. + &gmac1_rx_bus2
  243. + &gmac1_rgmii_clk
  244. + &gmac1_rgmii_bus>;
  245. + pinctrl-names = "default";
  246. + tx_delay = <0x42>;
  247. + status = "okay";
  248. +};
  249. +
  250. +&i2c0 {
  251. + pinctrl-names = "default";
  252. + pinctrl-0 = <&i2c0m2_xfer>;
  253. + status = "okay";
  254. +
  255. + vdd_cpu_big0_s0: regulator@42 {
  256. + compatible = "rockchip,rk8602";
  257. + reg = <0x42>;
  258. + fcs,suspend-voltage-selector = <1>;
  259. + regulator-name = "vdd_cpu_big0_s0";
  260. + regulator-always-on;
  261. + regulator-boot-on;
  262. + regulator-min-microvolt = <550000>;
  263. + regulator-max-microvolt = <1050000>;
  264. + regulator-ramp-delay = <2300>;
  265. + vin-supply = <&vcc5v0_sys>;
  266. +
  267. + regulator-state-mem {
  268. + regulator-off-in-suspend;
  269. + };
  270. + };
  271. +
  272. + vdd_cpu_big1_s0: regulator@43 {
  273. + compatible = "rockchip,rk8603", "rockchip,rk8602";
  274. + reg = <0x43>;
  275. + fcs,suspend-voltage-selector = <1>;
  276. + regulator-name = "vdd_cpu_big1_s0";
  277. + regulator-always-on;
  278. + regulator-boot-on;
  279. + regulator-min-microvolt = <550000>;
  280. + regulator-max-microvolt = <1050000>;
  281. + regulator-ramp-delay = <2300>;
  282. + vin-supply = <&vcc5v0_sys>;
  283. +
  284. + regulator-state-mem {
  285. + regulator-off-in-suspend;
  286. + };
  287. + };
  288. +};
  289. +
  290. +&i2c2 {
  291. + status = "okay";
  292. +
  293. + vdd_npu_s0: regulator@42 {
  294. + compatible = "rockchip,rk8602";
  295. + reg = <0x42>;
  296. + fcs,suspend-voltage-selector = <1>;
  297. + regulator-name = "vdd_npu_s0";
  298. + regulator-min-microvolt = <550000>;
  299. + regulator-max-microvolt = <950000>;
  300. + regulator-ramp-delay = <2300>;
  301. + regulator-boot-on;
  302. + regulator-always-on;
  303. + vin-supply = <&vcc5v0_sys>;
  304. +
  305. + regulator-state-mem {
  306. + regulator-off-in-suspend;
  307. + };
  308. + };
  309. +};
  310. +
  311. +&i2c6 {
  312. + clock-frequency = <200000>;
  313. + pinctrl-names = "default";
  314. + pinctrl-0 = <&i2c6m0_xfer>;
  315. + status = "okay";
  316. +
  317. + hym8563: rtc@51 {
  318. + compatible = "haoyu,hym8563";
  319. + reg = <0x51>;
  320. + #clock-cells = <0>;
  321. + clock-output-names = "hym8563";
  322. + pinctrl-names = "default";
  323. + pinctrl-0 = <&rtc_int>;
  324. + interrupt-parent = <&gpio0>;
  325. + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
  326. + wakeup-source;
  327. + };
  328. +};
  329. +
  330. +&mdio1 {
  331. + rgmii_phy1: ethernet-phy@1 {
  332. + compatible = "ethernet-phy-id001c.c916";
  333. + reg = <0x1>;
  334. + pinctrl-names = "default";
  335. + pinctrl-0 = <&rtl8211f_rst>;
  336. + reset-assert-us = <20000>;
  337. + reset-deassert-us = <100000>;
  338. + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  339. + };
  340. +};
  341. +
  342. +&pcie2x1l1 {
  343. + reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
  344. + vpcie3v3-supply = <&vcc_3v3_pcie20>;
  345. + status = "okay";
  346. +};
  347. +
  348. +&pcie2x1l2 {
  349. + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
  350. + vpcie3v3-supply = <&vcc_3v3_pcie20>;
  351. + status = "okay";
  352. +};
  353. +
  354. +&pinctrl {
  355. + gpio-key {
  356. + key1_pin: key1-pin {
  357. + rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
  358. + };
  359. + };
  360. +
  361. + gpio-leds {
  362. + sys_led_pin: sys-led-pin {
  363. + rockchip,pins =
  364. + <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  365. + };
  366. +
  367. + wan_led_pin: wan-led-pin {
  368. + rockchip,pins =
  369. + <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
  370. + };
  371. +
  372. + lan1_led_pin: lan1-led-pin {
  373. + rockchip,pins =
  374. + <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
  375. + };
  376. +
  377. + lan2_led_pin: lan2-led-pin {
  378. + rockchip,pins =
  379. + <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
  380. + };
  381. + };
  382. +
  383. + hym8563 {
  384. + rtc_int: rtc-int {
  385. + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
  386. + };
  387. + };
  388. +
  389. + sdmmc {
  390. + sd_s0_pwr: sd-s0-pwr {
  391. + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
  392. + };
  393. + };
  394. +
  395. + usb {
  396. + typec5v_pwren: typec5v-pwren {
  397. + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  398. + };
  399. +
  400. + vcc5v0_host20_en: vcc5v0-host20-en {
  401. + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  402. + };
  403. + };
  404. +
  405. + rtl8211f {
  406. + rtl8211f_rst: rtl8211f-rst {
  407. + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  408. + };
  409. + };
  410. +};
  411. +
  412. +&saradc {
  413. + vref-supply = <&avcc_1v8_s0>;
  414. + status = "okay";
  415. +};
  416. +
  417. +&sdhci {
  418. + bus-width = <8>;
  419. + no-sdio;
  420. + no-sd;
  421. + non-removable;
  422. + mmc-hs200-1_8v;
  423. + status = "okay";
  424. +};
  425. +
  426. +&sdmmc {
  427. + bus-width = <4>;
  428. + cap-sd-highspeed;
  429. + disable-wp;
  430. + max-frequency = <150000000>;
  431. + no-mmc;
  432. + no-sdio;
  433. + sd-uhs-sdr104;
  434. + vmmc-supply = <&vcc_3v3_sd_s0>;
  435. + vqmmc-supply = <&vccio_sd_s0>;
  436. + status = "okay";
  437. +};
  438. +
  439. +&spi2 {
  440. + status = "okay";
  441. + assigned-clocks = <&cru CLK_SPI2>;
  442. + assigned-clock-rates = <200000000>;
  443. + pinctrl-names = "default";
  444. + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
  445. + num-cs = <1>;
  446. +
  447. + pmic@0 {
  448. + compatible = "rockchip,rk806";
  449. + spi-max-frequency = <1000000>;
  450. + reg = <0x0>;
  451. +
  452. + interrupt-parent = <&gpio0>;
  453. + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
  454. +
  455. + pinctrl-names = "default";
  456. + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
  457. + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
  458. +
  459. + system-power-controller;
  460. +
  461. + vcc1-supply = <&vcc5v0_sys>;
  462. + vcc2-supply = <&vcc5v0_sys>;
  463. + vcc3-supply = <&vcc5v0_sys>;
  464. + vcc4-supply = <&vcc5v0_sys>;
  465. + vcc5-supply = <&vcc5v0_sys>;
  466. + vcc6-supply = <&vcc5v0_sys>;
  467. + vcc7-supply = <&vcc5v0_sys>;
  468. + vcc8-supply = <&vcc5v0_sys>;
  469. + vcc9-supply = <&vcc5v0_sys>;
  470. + vcc10-supply = <&vcc5v0_sys>;
  471. + vcc11-supply = <&vcc_2v0_pldo_s3>;
  472. + vcc12-supply = <&vcc5v0_sys>;
  473. + vcc13-supply = <&vcc_1v1_nldo_s3>;
  474. + vcc14-supply = <&vcc_1v1_nldo_s3>;
  475. + vcca-supply = <&vcc5v0_sys>;
  476. +
  477. + gpio-controller;
  478. + #gpio-cells = <2>;
  479. +
  480. + rk806_dvs1_null: dvs1-null-pins {
  481. + pins = "gpio_pwrctrl1";
  482. + function = "pin_fun0";
  483. + };
  484. +
  485. + rk806_dvs2_null: dvs2-null-pins {
  486. + pins = "gpio_pwrctrl2";
  487. + function = "pin_fun0";
  488. + };
  489. +
  490. + rk806_dvs3_null: dvs3-null-pins {
  491. + pins = "gpio_pwrctrl3";
  492. + function = "pin_fun0";
  493. + };
  494. +
  495. + regulators {
  496. + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
  497. + regulator-boot-on;
  498. + regulator-min-microvolt = <550000>;
  499. + regulator-max-microvolt = <950000>;
  500. + regulator-ramp-delay = <12500>;
  501. + regulator-name = "vdd_gpu_s0";
  502. + regulator-enable-ramp-delay = <400>;
  503. +
  504. + regulator-state-mem {
  505. + regulator-off-in-suspend;
  506. + };
  507. + };
  508. +
  509. + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
  510. + regulator-always-on;
  511. + regulator-boot-on;
  512. + regulator-min-microvolt = <550000>;
  513. + regulator-max-microvolt = <950000>;
  514. + regulator-ramp-delay = <12500>;
  515. + regulator-name = "vdd_cpu_lit_s0";
  516. +
  517. + regulator-state-mem {
  518. + regulator-off-in-suspend;
  519. + };
  520. + };
  521. +
  522. + vdd_log_s0: dcdc-reg3 {
  523. + regulator-always-on;
  524. + regulator-boot-on;
  525. + regulator-min-microvolt = <675000>;
  526. + regulator-max-microvolt = <750000>;
  527. + regulator-ramp-delay = <12500>;
  528. + regulator-name = "vdd_log_s0";
  529. +
  530. + regulator-state-mem {
  531. + regulator-off-in-suspend;
  532. + regulator-suspend-microvolt = <750000>;
  533. + };
  534. + };
  535. +
  536. + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
  537. + regulator-always-on;
  538. + regulator-boot-on;
  539. + regulator-min-microvolt = <550000>;
  540. + regulator-max-microvolt = <950000>;
  541. + regulator-ramp-delay = <12500>;
  542. + regulator-name = "vdd_vdenc_s0";
  543. +
  544. + regulator-state-mem {
  545. + regulator-off-in-suspend;
  546. + };
  547. + };
  548. +
  549. + vdd_ddr_s0: dcdc-reg5 {
  550. + regulator-always-on;
  551. + regulator-boot-on;
  552. + regulator-min-microvolt = <675000>;
  553. + regulator-max-microvolt = <900000>;
  554. + regulator-ramp-delay = <12500>;
  555. + regulator-name = "vdd_ddr_s0";
  556. +
  557. + regulator-state-mem {
  558. + regulator-off-in-suspend;
  559. + regulator-suspend-microvolt = <850000>;
  560. + };
  561. + };
  562. +
  563. + vdd2_ddr_s3: dcdc-reg6 {
  564. + regulator-always-on;
  565. + regulator-boot-on;
  566. + regulator-name = "vdd2_ddr_s3";
  567. +
  568. + regulator-state-mem {
  569. + regulator-on-in-suspend;
  570. + };
  571. + };
  572. +
  573. + vcc_2v0_pldo_s3: dcdc-reg7 {
  574. + regulator-always-on;
  575. + regulator-boot-on;
  576. + regulator-min-microvolt = <2000000>;
  577. + regulator-max-microvolt = <2000000>;
  578. + regulator-ramp-delay = <12500>;
  579. + regulator-name = "vdd_2v0_pldo_s3";
  580. +
  581. + regulator-state-mem {
  582. + regulator-on-in-suspend;
  583. + regulator-suspend-microvolt = <2000000>;
  584. + };
  585. + };
  586. +
  587. + vcc_3v3_s3: dcdc-reg8 {
  588. + regulator-always-on;
  589. + regulator-boot-on;
  590. + regulator-min-microvolt = <3300000>;
  591. + regulator-max-microvolt = <3300000>;
  592. + regulator-name = "vcc_3v3_s3";
  593. +
  594. + regulator-state-mem {
  595. + regulator-on-in-suspend;
  596. + regulator-suspend-microvolt = <3300000>;
  597. + };
  598. + };
  599. +
  600. + vddq_ddr_s0: dcdc-reg9 {
  601. + regulator-always-on;
  602. + regulator-boot-on;
  603. + regulator-name = "vddq_ddr_s0";
  604. +
  605. + regulator-state-mem {
  606. + regulator-off-in-suspend;
  607. + };
  608. + };
  609. +
  610. + vcc_1v8_s3: dcdc-reg10 {
  611. + regulator-always-on;
  612. + regulator-boot-on;
  613. + regulator-min-microvolt = <1800000>;
  614. + regulator-max-microvolt = <1800000>;
  615. + regulator-name = "vcc_1v8_s3";
  616. +
  617. + regulator-state-mem {
  618. + regulator-on-in-suspend;
  619. + regulator-suspend-microvolt = <1800000>;
  620. + };
  621. + };
  622. +
  623. + avcc_1v8_s0: pldo-reg1 {
  624. + regulator-always-on;
  625. + regulator-boot-on;
  626. + regulator-min-microvolt = <1800000>;
  627. + regulator-max-microvolt = <1800000>;
  628. + regulator-name = "avcc_1v8_s0";
  629. +
  630. + regulator-state-mem {
  631. + regulator-off-in-suspend;
  632. + regulator-suspend-microvolt = <1800000>;
  633. + };
  634. + };
  635. +
  636. + vcc_1v8_s0: pldo-reg2 {
  637. + regulator-always-on;
  638. + regulator-boot-on;
  639. + regulator-min-microvolt = <1800000>;
  640. + regulator-max-microvolt = <1800000>;
  641. + regulator-name = "vcc_1v8_s0";
  642. +
  643. + regulator-state-mem {
  644. + regulator-off-in-suspend;
  645. + regulator-suspend-microvolt = <1800000>;
  646. + };
  647. + };
  648. +
  649. + avdd_1v2_s0: pldo-reg3 {
  650. + regulator-always-on;
  651. + regulator-boot-on;
  652. + regulator-min-microvolt = <1200000>;
  653. + regulator-max-microvolt = <1200000>;
  654. + regulator-name = "avdd_1v2_s0";
  655. +
  656. + regulator-state-mem {
  657. + regulator-off-in-suspend;
  658. + };
  659. + };
  660. +
  661. + avcc_3v3_s0: pldo-reg4 {
  662. + regulator-always-on;
  663. + regulator-boot-on;
  664. + regulator-min-microvolt = <3300000>;
  665. + regulator-max-microvolt = <3300000>;
  666. + regulator-ramp-delay = <12500>;
  667. + regulator-name = "avcc_3v3_s0";
  668. +
  669. + regulator-state-mem {
  670. + regulator-off-in-suspend;
  671. + };
  672. + };
  673. +
  674. + vccio_sd_s0: pldo-reg5 {
  675. + regulator-always-on;
  676. + regulator-boot-on;
  677. + regulator-min-microvolt = <1800000>;
  678. + regulator-max-microvolt = <3300000>;
  679. + regulator-ramp-delay = <12500>;
  680. + regulator-name = "vccio_sd_s0";
  681. +
  682. + regulator-state-mem {
  683. + regulator-off-in-suspend;
  684. + };
  685. + };
  686. +
  687. + pldo6_s3: pldo-reg6 {
  688. + regulator-always-on;
  689. + regulator-boot-on;
  690. + regulator-min-microvolt = <1800000>;
  691. + regulator-max-microvolt = <1800000>;
  692. + regulator-name = "pldo6_s3";
  693. +
  694. + regulator-state-mem {
  695. + regulator-on-in-suspend;
  696. + regulator-suspend-microvolt = <1800000>;
  697. + };
  698. + };
  699. +
  700. + vdd_0v75_s3: nldo-reg1 {
  701. + regulator-always-on;
  702. + regulator-boot-on;
  703. + regulator-min-microvolt = <750000>;
  704. + regulator-max-microvolt = <750000>;
  705. + regulator-name = "vdd_0v75_s3";
  706. +
  707. + regulator-state-mem {
  708. + regulator-on-in-suspend;
  709. + regulator-suspend-microvolt = <750000>;
  710. + };
  711. + };
  712. +
  713. + avdd_ddr_pll_s0: nldo-reg2 {
  714. + regulator-always-on;
  715. + regulator-boot-on;
  716. + regulator-min-microvolt = <850000>;
  717. + regulator-max-microvolt = <850000>;
  718. + regulator-name = "avdd_ddr_pll_s0";
  719. +
  720. + regulator-state-mem {
  721. + regulator-off-in-suspend;
  722. + regulator-suspend-microvolt = <850000>;
  723. + };
  724. + };
  725. +
  726. + avdd_0v75_s0: nldo-reg3 {
  727. + regulator-always-on;
  728. + regulator-boot-on;
  729. + regulator-min-microvolt = <750000>;
  730. + regulator-max-microvolt = <750000>;
  731. + regulator-name = "avdd_0v75_s0";
  732. +
  733. + regulator-state-mem {
  734. + regulator-off-in-suspend;
  735. + };
  736. + };
  737. +
  738. + avdd_0v85_s0: nldo-reg4 {
  739. + regulator-always-on;
  740. + regulator-boot-on;
  741. + regulator-min-microvolt = <850000>;
  742. + regulator-max-microvolt = <850000>;
  743. + regulator-name = "avdd_0v85_s0";
  744. +
  745. + regulator-state-mem {
  746. + regulator-off-in-suspend;
  747. + };
  748. + };
  749. +
  750. + vdd_0v75_s0: nldo-reg5 {
  751. + regulator-always-on;
  752. + regulator-boot-on;
  753. + regulator-min-microvolt = <750000>;
  754. + regulator-max-microvolt = <750000>;
  755. + regulator-name = "vdd_0v75_s0";
  756. +
  757. + regulator-state-mem {
  758. + regulator-off-in-suspend;
  759. + };
  760. + };
  761. + };
  762. + };
  763. +};
  764. +
  765. +&tsadc {
  766. + status = "okay";
  767. +};
  768. +
  769. +&u2phy2 {
  770. + status = "okay";
  771. +};
  772. +
  773. +&u2phy2_host {
  774. + phy-supply = <&vcc5v0_host_20>;
  775. + status = "okay";
  776. +};
  777. +
  778. +&uart2 {
  779. + pinctrl-0 = <&uart2m0_xfer>;
  780. + status = "okay";
  781. +};
  782. +
  783. +&usb_host0_ehci {
  784. + status = "okay";
  785. +};
  786. +
  787. +&usb_host0_ohci {
  788. + status = "okay";
  789. +};