308-dts-ipq4019-add-both-IPQ4019-wifi-block-definitions.patch 3.6 KB

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  1. From 6091a49b0b06bf838fed80498c4f5f40d0fbd447 Mon Sep 17 00:00:00 2001
  2. From: Christian Lamparter <[email protected]>
  3. Date: Sat, 19 Nov 2016 01:22:46 +0100
  4. Subject: [PATCH] dts: ipq4019: add both IPQ4019 wifi block definitions
  5. The IPQ4019 has two ath10k blocks on the AHB. Both wifi's
  6. are already supported by ath10k.
  7. Signed-off-by: Christian Lamparter <[email protected]>
  8. ---
  9. arch/arm/boot/dts/qcom-ipq4019.dtsi | 84 +++++++++++++++++++++++++++++++++++++
  10. 1 file changed, 84 insertions(+)
  11. --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
  12. +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
  13. @@ -384,5 +384,89 @@
  14. dr_mode = "host";
  15. };
  16. };
  17. +
  18. + wifi0: wifi@a000000 {
  19. + compatible = "qcom,ipq4019-wifi";
  20. + reg = <0xa000000 0x200000>;
  21. + resets = <&gcc WIFI0_CPU_INIT_RESET
  22. + &gcc WIFI0_RADIO_SRIF_RESET
  23. + &gcc WIFI0_RADIO_WARM_RESET
  24. + &gcc WIFI0_RADIO_COLD_RESET
  25. + &gcc WIFI0_CORE_WARM_RESET
  26. + &gcc WIFI0_CORE_COLD_RESET>;
  27. + reset-names = "wifi_cpu_init", "wifi_radio_srif",
  28. + "wifi_radio_warm", "wifi_radio_cold",
  29. + "wifi_core_warm", "wifi_core_cold";
  30. + clocks = <&gcc GCC_WCSS2G_CLK
  31. + &gcc GCC_WCSS2G_REF_CLK
  32. + &gcc GCC_WCSS2G_RTC_CLK>;
  33. + clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
  34. + "wifi_wcss_rtc";
  35. + interrupts = <0 32 IRQ_TYPE_EDGE_RISING
  36. + 0 33 IRQ_TYPE_EDGE_RISING
  37. + 0 34 IRQ_TYPE_EDGE_RISING
  38. + 0 35 IRQ_TYPE_EDGE_RISING
  39. + 0 36 IRQ_TYPE_EDGE_RISING
  40. + 0 37 IRQ_TYPE_EDGE_RISING
  41. + 0 38 IRQ_TYPE_EDGE_RISING
  42. + 0 39 IRQ_TYPE_EDGE_RISING
  43. + 0 40 IRQ_TYPE_EDGE_RISING
  44. + 0 41 IRQ_TYPE_EDGE_RISING
  45. + 0 42 IRQ_TYPE_EDGE_RISING
  46. + 0 43 IRQ_TYPE_EDGE_RISING
  47. + 0 44 IRQ_TYPE_EDGE_RISING
  48. + 0 45 IRQ_TYPE_EDGE_RISING
  49. + 0 46 IRQ_TYPE_EDGE_RISING
  50. + 0 47 IRQ_TYPE_EDGE_RISING
  51. + 0 168 IRQ_TYPE_NONE>;
  52. + interrupt-names = "msi0", "msi1", "msi2", "msi3",
  53. + "msi4", "msi5", "msi6", "msi7",
  54. + "msi8", "msi9", "msi10", "msi11",
  55. + "msi12", "msi13", "msi14", "msi15",
  56. + "legacy";
  57. + status = "disabled";
  58. + };
  59. +
  60. + wifi1: wifi@a800000 {
  61. + compatible = "qcom,ipq4019-wifi";
  62. + reg = <0xa800000 0x200000>;
  63. + resets = <&gcc WIFI1_CPU_INIT_RESET
  64. + &gcc WIFI1_RADIO_SRIF_RESET
  65. + &gcc WIFI1_RADIO_WARM_RESET
  66. + &gcc WIFI1_RADIO_COLD_RESET
  67. + &gcc WIFI1_CORE_WARM_RESET
  68. + &gcc WIFI1_CORE_COLD_RESET>;
  69. + reset-names = "wifi_cpu_init", "wifi_radio_srif",
  70. + "wifi_radio_warm", "wifi_radio_cold",
  71. + "wifi_core_warm", "wifi_core_cold";
  72. + clocks = <&gcc GCC_WCSS5G_CLK
  73. + &gcc GCC_WCSS5G_REF_CLK
  74. + &gcc GCC_WCSS5G_RTC_CLK>;
  75. + clock-names = "wifi_wcss_cmd", "wifi_wcss_ref",
  76. + "wifi_wcss_rtc";
  77. + interrupts = <0 48 IRQ_TYPE_EDGE_RISING
  78. + 0 49 IRQ_TYPE_EDGE_RISING
  79. + 0 50 IRQ_TYPE_EDGE_RISING
  80. + 0 51 IRQ_TYPE_EDGE_RISING
  81. + 0 52 IRQ_TYPE_EDGE_RISING
  82. + 0 53 IRQ_TYPE_EDGE_RISING
  83. + 0 54 IRQ_TYPE_EDGE_RISING
  84. + 0 55 IRQ_TYPE_EDGE_RISING
  85. + 0 56 IRQ_TYPE_EDGE_RISING
  86. + 0 57 IRQ_TYPE_EDGE_RISING
  87. + 0 58 IRQ_TYPE_EDGE_RISING
  88. + 0 59 IRQ_TYPE_EDGE_RISING
  89. + 0 60 IRQ_TYPE_EDGE_RISING
  90. + 0 61 IRQ_TYPE_EDGE_RISING
  91. + 0 62 IRQ_TYPE_EDGE_RISING
  92. + 0 63 IRQ_TYPE_EDGE_RISING
  93. + 0 169 IRQ_TYPE_NONE>;
  94. + interrupt-names = "msi0", "msi1", "msi2", "msi3",
  95. + "msi4", "msi5", "msi6", "msi7",
  96. + "msi8", "msi9", "msi10", "msi11",
  97. + "msi12", "msi13", "msi14", "msi15",
  98. + "legacy";
  99. + status = "disabled";
  100. + };
  101. };
  102. };