0002-clearfog-reset-usom-onboard-1512-phy.patch 1.3 KB

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  1. From 98848106b9558244ae36a85229caabcdb57d0f7b Mon Sep 17 00:00:00 2001
  2. From: Jonas Gorski <[email protected]>
  3. Date: Fri, 23 Sep 2016 13:58:14 +0200
  4. Subject: [PATCH 2/4] clearfog: reset usom onboard 1512 phy
  5. Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
  6. the uSOM's 88E81512 gigabit Ethernet phy.
  7. This GPIO is valid on ClearFog rev 2.1 and newer.
  8. Signed-off-by: Rabeeh Khoury <[email protected]>
  9. [jonas.gorski: adapted to upstream u-boot code]
  10. Signed-off-by: Jonas Gorski <[email protected]>
  11. ---
  12. board/solidrun/clearfog/clearfog.c | 4 ++++
  13. 1 file changed, 4 insertions(+)
  14. diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
  15. index 2773f5957e..3a8257cac3 100644
  16. --- a/board/solidrun/clearfog/clearfog.c
  17. +++ b/board/solidrun/clearfog/clearfog.c
  18. @@ -131,8 +131,12 @@ int board_init(void)
  19. /* Toggle GPIO41 to reset onboard switch and phy */
  20. clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
  21. clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9));
  22. + /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */
  23. + clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
  24. + clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19));
  25. mdelay(1);
  26. setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9));
  27. + setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19));
  28. mdelay(10);
  29. /* Init I2C IO expanders */
  30. --
  31. 2.12.2