0022-dt-bindings-thermal-Add-binding-document-for-Mediate.patch 2.0 KB

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  1. From 9b799b8a4ecbf560f8fb996e8e5147a8f7b9a1b3 Mon Sep 17 00:00:00 2001
  2. From: Sascha Hauer <[email protected]>
  3. Date: Wed, 13 May 2015 10:52:41 +0200
  4. Subject: [PATCH 22/76] dt-bindings: thermal: Add binding document for
  5. Mediatek thermal controller
  6. Signed-off-by: Sascha Hauer <[email protected]>
  7. ---
  8. .../bindings/thermal/mediatek-thermal.txt | 36 ++++++++++++++++++++
  9. 1 file changed, 36 insertions(+)
  10. create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
  11. --- /dev/null
  12. +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
  13. @@ -0,0 +1,36 @@
  14. +* Mediatek Thermal
  15. +
  16. +This describes the device tree binding for the Mediatek thermal controller
  17. +which measures the on-SoC temperatures. This device does not have its own ADC,
  18. +instead it directly controls the AUXADC via AHB bus accesses. For this reason
  19. +this device needs phandles to the AUXADC.
  20. +
  21. +Required properties:
  22. +- compatible: "mediatek,mt8173-thermal"
  23. +- reg: Address range of the thermal controller
  24. +- interrupts: IRQ for the thermal controller
  25. +- clocks, clock-names: Clocks needed for the thermal controller. required
  26. + clocks are:
  27. + "therm": Main clock needed for register access
  28. + "auxadc": The AUXADC clock
  29. +- resets, reset-names: Reference to the reset controller controlling the thermal
  30. + controller. Required reset-names:
  31. + "therm": The main reset line
  32. +- auxadc: A phandle to the AUXADC which the thermal controller uses
  33. +- apmixedsys: A phandle to the APMIXEDSYS controller.
  34. +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
  35. +
  36. +Example:
  37. +
  38. + thermal: thermal@1100b000 {
  39. + #thermal-sensor-cells = <1>;
  40. + compatible = "mediatek,mt8173-thermal";
  41. + reg = <0 0x1100b000 0 0x1000>;
  42. + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
  43. + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
  44. + clock-names = "therm", "auxadc";
  45. + resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
  46. + reset-names = "therm";
  47. + auxadc = <&auxadc>;
  48. + apmixedsys = <&apmixedsys>;
  49. + };