797-net-ethernet-mtk_eth_wed-add-axi-bus-support.patch 7.0 KB

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  1. From 6e1df49f330dce7c58a39d6772f1385b6887bb03 Mon Sep 17 00:00:00 2001
  2. Message-Id: <6e1df49f330dce7c58a39d6772f1385b6887bb03.1662990860.git.lorenzo@kernel.org>
  3. From: Lorenzo Bianconi <[email protected]>
  4. Date: Thu, 8 Sep 2022 11:26:10 +0200
  5. Subject: [PATCH net-next] net: ethernet: mtk_eth_wed: add axi bus support
  6. Other than pcie bus, introduce support for axi bus to mtk wed driver.
  7. Axi bus is used to connect mt7986-wmac soc chip available on mt7986
  8. device.
  9. Co-developed-by: Bo Jiao <[email protected]>
  10. Signed-off-by: Bo Jiao <[email protected]>
  11. Co-developed-by: Sujuan Chen <[email protected]>
  12. Signed-off-by: Sujuan Chen <[email protected]>
  13. Signed-off-by: Lorenzo Bianconi <[email protected]>
  14. ---
  15. drivers/net/ethernet/mediatek/mtk_wed.c | 116 +++++++++++++------
  16. drivers/net/ethernet/mediatek/mtk_wed_regs.h | 2 +
  17. include/linux/soc/mediatek/mtk_wed.h | 11 +-
  18. 3 files changed, 91 insertions(+), 38 deletions(-)
  19. --- a/drivers/net/ethernet/mediatek/mtk_wed.c
  20. +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
  21. @@ -85,11 +85,31 @@ static struct mtk_wed_hw *
  22. mtk_wed_assign(struct mtk_wed_device *dev)
  23. {
  24. struct mtk_wed_hw *hw;
  25. + int i;
  26. +
  27. + if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
  28. + hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
  29. + if (!hw)
  30. + return NULL;
  31. +
  32. + if (!hw->wed_dev)
  33. + goto out;
  34. +
  35. + if (hw->version == 1)
  36. + return NULL;
  37. +
  38. + /* MT7986 WED devices do not have any pcie slot restrictions */
  39. + }
  40. + /* MT7986 PCIE or AXI */
  41. + for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  42. + hw = hw_list[i];
  43. + if (hw && !hw->wed_dev)
  44. + goto out;
  45. + }
  46. - hw = hw_list[pci_domain_nr(dev->wlan.pci_dev->bus)];
  47. - if (!hw || hw->wed_dev)
  48. - return NULL;
  49. + return NULL;
  50. +out:
  51. hw->wed_dev = dev;
  52. return hw;
  53. }
  54. @@ -322,7 +342,6 @@ mtk_wed_stop(struct mtk_wed_device *dev)
  55. static void
  56. mtk_wed_detach(struct mtk_wed_device *dev)
  57. {
  58. - struct device_node *wlan_node = dev->wlan.pci_dev->dev.of_node;
  59. struct mtk_wed_hw *hw = dev->hw;
  60. mutex_lock(&hw_lock);
  61. @@ -337,9 +356,14 @@ mtk_wed_detach(struct mtk_wed_device *de
  62. mtk_wed_free_buffer(dev);
  63. mtk_wed_free_tx_rings(dev);
  64. - if (of_dma_is_coherent(wlan_node) && hw->hifsys)
  65. - regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
  66. - BIT(hw->index), BIT(hw->index));
  67. + if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
  68. + struct device_node *wlan_node;
  69. +
  70. + wlan_node = dev->wlan.pci_dev->dev.of_node;
  71. + if (of_dma_is_coherent(wlan_node) && hw->hifsys)
  72. + regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP,
  73. + BIT(hw->index), BIT(hw->index));
  74. + }
  75. if (!hw_list[!hw->index]->wed_dev &&
  76. hw->eth->dma_dev != hw->eth->dev)
  77. @@ -356,40 +380,54 @@ mtk_wed_detach(struct mtk_wed_device *de
  78. static void
  79. mtk_wed_bus_init(struct mtk_wed_device *dev)
  80. {
  81. - struct device_node *np = dev->hw->eth->dev->of_node;
  82. - struct regmap *regs;
  83. - u32 val;
  84. -
  85. - regs = syscon_regmap_lookup_by_phandle(np, "mediatek,wed-pcie");
  86. - if (IS_ERR(regs))
  87. - return;
  88. + switch (dev->wlan.bus_type) {
  89. + case MTK_WED_BUS_PCIE: {
  90. + struct device_node *np = dev->hw->eth->dev->of_node;
  91. + struct regmap *regs;
  92. + u32 val;
  93. +
  94. + regs = syscon_regmap_lookup_by_phandle(np,
  95. + "mediatek,wed-pcie");
  96. + if (IS_ERR(regs))
  97. + break;
  98. - regmap_update_bits(regs, 0, BIT(0), BIT(0));
  99. + regmap_update_bits(regs, 0, BIT(0), BIT(0));
  100. - wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
  101. - FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
  102. + wed_w32(dev, MTK_WED_PCIE_INT_CTRL,
  103. + FIELD_PREP(MTK_WED_PCIE_INT_CTRL_POLL_EN, 2));
  104. - /* pcie interrupt control: pola/source selection */
  105. - wed_set(dev, MTK_WED_PCIE_INT_CTRL,
  106. - MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
  107. - FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
  108. - wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
  109. -
  110. - val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
  111. - val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
  112. - wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
  113. - wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
  114. -
  115. - val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
  116. - val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
  117. -
  118. - /* pcie interrupt status trigger register */
  119. - wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
  120. - wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
  121. -
  122. - /* pola setting */
  123. - val = wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
  124. - wed_set(dev, MTK_WED_PCIE_INT_CTRL, MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
  125. + /* pcie interrupt control: pola/source selection */
  126. + wed_set(dev, MTK_WED_PCIE_INT_CTRL,
  127. + MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA |
  128. + FIELD_PREP(MTK_WED_PCIE_INT_CTRL_SRC_SEL, 1));
  129. + wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
  130. +
  131. + val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
  132. + val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
  133. + wed_w32(dev, MTK_WED_PCIE_CFG_INTM, PCIE_BASE_ADDR0 | 0x180);
  134. + wed_w32(dev, MTK_WED_PCIE_CFG_BASE, PCIE_BASE_ADDR0 | 0x184);
  135. +
  136. + val = wed_r32(dev, MTK_WED_PCIE_CFG_INTM);
  137. + val = wed_r32(dev, MTK_WED_PCIE_CFG_BASE);
  138. +
  139. + /* pcie interrupt status trigger register */
  140. + wed_w32(dev, MTK_WED_PCIE_INT_TRIGGER, BIT(24));
  141. + wed_r32(dev, MTK_WED_PCIE_INT_TRIGGER);
  142. +
  143. + /* pola setting */
  144. + val = wed_r32(dev, MTK_WED_PCIE_INT_CTRL);
  145. + wed_set(dev, MTK_WED_PCIE_INT_CTRL,
  146. + MTK_WED_PCIE_INT_CTRL_MSK_EN_POLA);
  147. + break;
  148. + }
  149. + case MTK_WED_BUS_AXI:
  150. + wed_set(dev, MTK_WED_WPDMA_INT_CTRL,
  151. + MTK_WED_WPDMA_INT_CTRL_SIG_SRC |
  152. + FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_SRC_SEL, 0));
  153. + break;
  154. + default:
  155. + break;
  156. + }
  157. }
  158. static void
  159. @@ -800,12 +838,14 @@ mtk_wed_attach(struct mtk_wed_device *de
  160. __releases(RCU)
  161. {
  162. struct mtk_wed_hw *hw;
  163. + struct device *device;
  164. int ret = 0;
  165. RCU_LOCKDEP_WARN(!rcu_read_lock_held(),
  166. "mtk_wed_attach without holding the RCU read lock");
  167. - if (pci_domain_nr(dev->wlan.pci_dev->bus) > 1 ||
  168. + if ((dev->wlan.bus_type == MTK_WED_BUS_PCIE &&
  169. + pci_domain_nr(dev->wlan.pci_dev->bus) > 1) ||
  170. !try_module_get(THIS_MODULE))
  171. ret = -ENODEV;
  172. @@ -823,8 +863,10 @@ mtk_wed_attach(struct mtk_wed_device *de
  173. goto out;
  174. }
  175. - dev_info(&dev->wlan.pci_dev->dev,
  176. - "attaching wed device %d version %d\n",
  177. + device = dev->wlan.bus_type == MTK_WED_BUS_PCIE
  178. + ? &dev->wlan.pci_dev->dev
  179. + : &dev->wlan.platform_dev->dev;
  180. + dev_info(device, "attaching wed device %d version %d\n",
  181. hw->index, hw->version);
  182. dev->hw = hw;
  183. --- a/drivers/net/ethernet/mediatek/mtk_wed_regs.h
  184. +++ b/drivers/net/ethernet/mediatek/mtk_wed_regs.h
  185. @@ -198,6 +198,8 @@ struct mtk_wdma_desc {
  186. #define MTK_WED_WPDMA_INT_CTRL 0x520
  187. #define MTK_WED_WPDMA_INT_CTRL_SUBRT_ADV BIT(21)
  188. +#define MTK_WED_WPDMA_INT_CTRL_SIG_SRC BIT(22)
  189. +#define MTK_WED_WPDMA_INT_CTRL_SRC_SEL GENMASK(17, 16)
  190. #define MTK_WED_WPDMA_INT_MASK 0x524
  191. --- a/include/linux/soc/mediatek/mtk_wed.h
  192. +++ b/include/linux/soc/mediatek/mtk_wed.h
  193. @@ -11,6 +11,11 @@
  194. struct mtk_wed_hw;
  195. struct mtk_wdma_desc;
  196. +enum mtk_wed_bus_tye {
  197. + MTK_WED_BUS_PCIE,
  198. + MTK_WED_BUS_AXI,
  199. +};
  200. +
  201. struct mtk_wed_ring {
  202. struct mtk_wdma_desc *desc;
  203. dma_addr_t desc_phys;
  204. @@ -43,7 +48,11 @@ struct mtk_wed_device {
  205. /* filled by driver: */
  206. struct {
  207. - struct pci_dev *pci_dev;
  208. + union {
  209. + struct platform_device *platform_dev;
  210. + struct pci_dev *pci_dev;
  211. + };
  212. + enum mtk_wed_bus_tye bus_type;
  213. u32 wpdma_phys;
  214. u32 wpdma_int;