302-dts-0059-arm64-dts-fsl-ls1046-Modify-the-qspi-flash-frequency.patch 1.7 KB

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  1. From 0a4e4723a1765770bb04ec4a5ad427b2c97627b6 Mon Sep 17 00:00:00 2001
  2. From: Pankaj Bansal <[email protected]>
  3. Date: Tue, 21 May 2019 20:26:29 +0530
  4. Subject: [PATCH] arm64: dts: fsl: ls1046: Modify the qspi flash frequency
  5. The qspi flash in ls1046a based QDS and RDB boards can operate
  6. at 50MHz frequency.
  7. Therefore, update the maximum supported freq in their respective
  8. dts files.
  9. Signed-off-by: Pankaj Bansal <[email protected]>
  10. ---
  11. arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 +-
  12. arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 5 +++--
  13. 2 files changed, 4 insertions(+), 3 deletions(-)
  14. --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
  15. +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
  16. @@ -184,7 +184,7 @@
  17. compatible = "spansion,m25p80";
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. - spi-max-frequency = <20000000>;
  21. + spi-max-frequency = <50000000>;
  22. spi-rx-bus-width = <4>;
  23. spi-tx-bus-width = <4>;
  24. reg = <0>;
  25. --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
  26. +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
  27. @@ -3,6 +3,7 @@
  28. * Device Tree Include file for Freescale Layerscape-1046A family SoC.
  29. *
  30. * Copyright 2016 Freescale Semiconductor, Inc.
  31. + * Copyright 2019 NXP
  32. *
  33. * Mingkai Hu <[email protected]>
  34. */
  35. @@ -106,7 +107,7 @@
  36. compatible = "spansion,m25p80";
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. - spi-max-frequency = <20000000>;
  40. + spi-max-frequency = <50000000>;
  41. spi-rx-bus-width = <4>;
  42. spi-tx-bus-width = <4>;
  43. reg = <0>;
  44. @@ -116,7 +117,7 @@
  45. compatible = "spansion,m25p80";
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. - spi-max-frequency = <20000000>;
  49. + spi-max-frequency = <50000000>;
  50. spi-rx-bus-width = <4>;
  51. spi-tx-bus-width = <4>;
  52. reg = <1>;