qcom-ipq8065-nbg6817.dts 5.4 KB

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  1. #include "qcom-ipq8065.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "ZyXEL NBG6817";
  5. compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. aliases {
  11. mdio-gpio0 = &mdio0;
  12. sdcc1 = &sdcc1;
  13. led-boot = &power;
  14. led-failsafe = &power;
  15. led-running = &power;
  16. led-upgrade = &power;
  17. };
  18. chosen {
  19. bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd";
  20. append-rootblock = "root=/dev/mmcblk0p";
  21. };
  22. keys {
  23. compatible = "gpio-keys";
  24. pinctrl-0 = <&button_pins>;
  25. pinctrl-names = "default";
  26. wifi {
  27. label = "wifi";
  28. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
  29. linux,code = <KEY_RFKILL>;
  30. linux,input-type = <EV_SW>;
  31. };
  32. reset {
  33. label = "reset";
  34. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  35. linux,code = <KEY_RESTART>;
  36. };
  37. wps {
  38. label = "wps";
  39. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  40. linux,code = <KEY_WPS_BUTTON>;
  41. };
  42. };
  43. leds {
  44. compatible = "gpio-leds";
  45. pinctrl-0 = <&led_pins>;
  46. pinctrl-names = "default";
  47. internet {
  48. label = "white:internet";
  49. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  50. };
  51. power: power {
  52. label = "white:power";
  53. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  54. default-state = "keep";
  55. };
  56. wifi2g {
  57. label = "amber:wifi2g";
  58. gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
  59. };
  60. /* wifi2g amber from the manual is missing */
  61. wifi5g {
  62. label = "amber:wifi5g";
  63. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  64. };
  65. /* wifi5g amber from the manual is missing */
  66. };
  67. };
  68. &qcom_pinmux {
  69. button_pins: button_pins {
  70. mux {
  71. pins = "gpio53", "gpio54", "gpio65";
  72. function = "gpio";
  73. drive-strength = <2>;
  74. bias-pull-up;
  75. };
  76. };
  77. led_pins: led_pins {
  78. mux {
  79. pins = "gpio9", "gpio26", "gpio33", "gpio64";
  80. function = "gpio";
  81. drive-strength = <2>;
  82. bias-pull-down;
  83. };
  84. };
  85. mdio0_pins: mdio0_pins {
  86. clk {
  87. pins = "gpio1";
  88. input-disable;
  89. };
  90. };
  91. rgmii2_pins: rgmii2_pins {
  92. tx {
  93. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  94. input-disable;
  95. };
  96. };
  97. spi_pins: spi_pins {
  98. cs {
  99. pins = "gpio20";
  100. drive-strength = <12>;
  101. };
  102. };
  103. usb0_pwr_en_pins: usb0_pwr_en_pins {
  104. mux {
  105. pins = "gpio16", "gpio17";
  106. function = "gpio";
  107. drive-strength = <12>;
  108. };
  109. pwr {
  110. pins = "gpio17";
  111. bias-pull-down;
  112. output-high;
  113. };
  114. ovc {
  115. pins = "gpio16";
  116. bias-pull-up;
  117. };
  118. };
  119. usb1_pwr_en_pins: usb1_pwr_en_pins {
  120. mux {
  121. pins = "gpio14", "gpio15";
  122. function = "gpio";
  123. drive-strength = <12>;
  124. };
  125. pwr {
  126. pins = "gpio14";
  127. bias-pull-down;
  128. output-high;
  129. };
  130. ovc {
  131. pins = "gpio15";
  132. bias-pull-up;
  133. };
  134. };
  135. };
  136. &gsbi5 {
  137. qcom,mode = <GSBI_PROT_SPI>;
  138. status = "okay";
  139. spi4: spi@1a280000 {
  140. status = "okay";
  141. pinctrl-0 = <&spi_pins>;
  142. pinctrl-names = "default";
  143. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  144. m25p80@0 {
  145. compatible = "jedec,spi-nor";
  146. #address-cells = <1>;
  147. #size-cells = <1>;
  148. spi-max-frequency = <51200000>;
  149. reg = <0>;
  150. partitions {
  151. compatible = "qcom,smem";
  152. };
  153. };
  154. };
  155. };
  156. &usb3_0 {
  157. status = "okay";
  158. pinctrl-0 = <&usb0_pwr_en_pins>;
  159. pinctrl-names = "default";
  160. };
  161. &usb3_1 {
  162. status = "okay";
  163. pinctrl-0 = <&usb1_pwr_en_pins>;
  164. pinctrl-names = "default";
  165. };
  166. &pcie0 {
  167. status = "okay";
  168. reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
  169. pinctrl-0 = <&pcie0_pins>;
  170. pinctrl-names = "default";
  171. };
  172. &pcie1 {
  173. status = "okay";
  174. reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
  175. pinctrl-0 = <&pcie1_pins>;
  176. pinctrl-names = "default";
  177. max-link-speed = <1>;
  178. };
  179. &mdio0 {
  180. status = "okay";
  181. pinctrl-0 = <&mdio0_pins>;
  182. pinctrl-names = "default";
  183. phy0: ethernet-phy@0 {
  184. reg = <0>;
  185. qca,ar8327-initvals = <
  186. 0x00004 0x7600000 /* PAD0_MODE */
  187. 0x00008 0x1000000 /* PAD5_MODE */
  188. 0x0000c 0x80 /* PAD6_MODE */
  189. 0x000e4 0xaa545 /* MAC_POWER_SEL */
  190. 0x000e0 0xc74164de /* SGMII_CTRL */
  191. 0x0007c 0x4e /* PORT0_STATUS */
  192. 0x00094 0x4e /* PORT6_STATUS */
  193. 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
  194. 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
  195. 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
  196. 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
  197. 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
  198. 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
  199. 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
  200. 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
  201. 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
  202. 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
  203. 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
  204. 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
  205. 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
  206. 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
  207. >;
  208. };
  209. phy4: ethernet-phy@4 {
  210. reg = <4>;
  211. qca,ar8327-initvals = <
  212. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  213. 0x0000c 0x80 /* PAD6_MODE */
  214. >;
  215. };
  216. };
  217. &gmac1 {
  218. status = "okay";
  219. phy-mode = "rgmii";
  220. qcom,id = <1>;
  221. qcom,phy_mdio_addr = <4>;
  222. qcom,poll_required = <0>;
  223. qcom,rgmii_delay = <1>;
  224. qcom,phy_mii_type = <0>;
  225. qcom,emulation = <0>;
  226. qcom,irq = <255>;
  227. mdiobus = <&mdio0>;
  228. pinctrl-0 = <&rgmii2_pins>;
  229. pinctrl-names = "default";
  230. fixed-link {
  231. speed = <1000>;
  232. full-duplex;
  233. };
  234. };
  235. &gmac2 {
  236. status = "okay";
  237. phy-mode = "sgmii";
  238. qcom,id = <2>;
  239. qcom,phy_mdio_addr = <0>; /* none */
  240. qcom,poll_required = <0>; /* no polling */
  241. qcom,rgmii_delay = <0>;
  242. qcom,phy_mii_type = <1>;
  243. qcom,emulation = <0>;
  244. qcom,irq = <258>;
  245. mdiobus = <&mdio0>;
  246. fixed-link {
  247. speed = <1000>;
  248. full-duplex;
  249. };
  250. };
  251. &amba {
  252. sdcc1: sdcc@12400000 {
  253. status = "okay";
  254. };
  255. };
  256. &adm_dma {
  257. status = "okay";
  258. };