0014-v5.19-arm64-dts-qcom-correct-DWC3-node-names-and-unit-addr.patch 1.3 KB

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  1. From ee9002a825695b5dca76f758a9365ca7f7d18265 Mon Sep 17 00:00:00 2001
  2. From: Krzysztof Kozlowski <[email protected]>
  3. Date: Wed, 4 May 2022 15:19:16 +0200
  4. Subject: [PATCH] arm64: dts: qcom: correct DWC3 node names and unit addresses
  5. Align DWC3 USB node names with DT schema ("usb" is expected) and correct
  6. the unit addresses to match the "reg" property. This also implies
  7. overriding nodes by label, instead of full path.
  8. Signed-off-by: Krzysztof Kozlowski <[email protected]>
  9. Link: https://lore.kernel.org/r/[email protected]
  10. Signed-off-by: Greg Kroah-Hartman <[email protected]>
  11. ---
  12. arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
  13. 1 file changed, 2 insertions(+), 2 deletions(-)
  14. --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  15. +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  16. @@ -579,7 +579,7 @@
  17. resets = <&gcc GCC_USB0_BCR>;
  18. status = "disabled";
  19. - dwc_0: dwc3@8a00000 {
  20. + dwc_0: usb@8a00000 {
  21. compatible = "snps,dwc3";
  22. reg = <0x8a00000 0xcd00>;
  23. interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
  24. @@ -619,7 +619,7 @@
  25. resets = <&gcc GCC_USB1_BCR>;
  26. status = "disabled";
  27. - dwc_1: dwc3@8c00000 {
  28. + dwc_1: usb@8c00000 {
  29. compatible = "snps,dwc3";
  30. reg = <0x8c00000 0xcd00>;
  31. interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;