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- From 6b9d5ecd2913758780a0529f9b95392f330b721b Mon Sep 17 00:00:00 2001
- From: Robert Marko <[email protected]>
- Date: Fri, 19 Aug 2022 00:06:21 +0200
- Subject: [PATCH] clk: qcom: apss-ipq6018: fix apcs_alias0_clk_src
- While working on IPQ8074 APSS driver it was discovered that IPQ6018 and
- IPQ8074 use almost the same PLL and APSS clocks, however APSS driver is
- currently broken.
- More precisely apcs_alias0_clk_src is broken, it was added as regmap_mux
- clock.
- However after debugging why it was always stuck at 800Mhz, it was figured
- out that its not regmap_mux compatible at all.
- It is a simple mux but it uses RCG2 register layout and control bits, so
- utilize the new clk_rcg2_mux_closest_ops to correctly drive it while not
- having to provide a dummy frequency table.
- While we are here, use ARRAY_SIZE for number of parents.
- Tested on IPQ6018-CP01-C1 reference board and multiple IPQ8074 boards.
- Fixes: 5e77b4ef1b19 ("clk: qcom: Add ipq6018 apss clock controller")
- Signed-off-by: Robert Marko <[email protected]>
- Reviewed-by: Dmitry Baryshkov <[email protected]>
- Signed-off-by: Bjorn Andersson <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- ---
- drivers/clk/qcom/apss-ipq6018.c | 13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
- --- a/drivers/clk/qcom/apss-ipq6018.c
- +++ b/drivers/clk/qcom/apss-ipq6018.c
- @@ -16,7 +16,7 @@
- #include "clk-regmap.h"
- #include "clk-branch.h"
- #include "clk-alpha-pll.h"
- -#include "clk-regmap-mux.h"
- +#include "clk-rcg.h"
-
- enum {
- P_XO,
- @@ -33,16 +33,15 @@ static const struct parent_map parents_a
- { P_APSS_PLL_EARLY, 5 },
- };
-
- -static struct clk_regmap_mux apcs_alias0_clk_src = {
- - .reg = 0x0050,
- - .width = 3,
- - .shift = 7,
- +static struct clk_rcg2 apcs_alias0_clk_src = {
- + .cmd_rcgr = 0x0050,
- + .hid_width = 5,
- .parent_map = parents_apcs_alias0_clk_src_map,
- .clkr.hw.init = &(struct clk_init_data){
- .name = "apcs_alias0_clk_src",
- .parent_data = parents_apcs_alias0_clk_src,
- - .num_parents = 2,
- - .ops = &clk_regmap_mux_closest_ops,
- + .num_parents = ARRAY_SIZE(parents_apcs_alias0_clk_src),
- + .ops = &clk_rcg2_mux_closest_ops,
- .flags = CLK_SET_RATE_PARENT,
- },
- };
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