0018-PCI-microchip-Rename-two-PCIe-data-structures.patch 11 KB

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  1. From 7c1c679bdd0b6b727248edbee77836024c935f91 Mon Sep 17 00:00:00 2001
  2. From: Minda Chen <[email protected]>
  3. Date: Mon, 8 Jan 2024 19:05:55 +0800
  4. Subject: [PATCH 018/116] PCI: microchip: Rename two PCIe data structures
  5. Add PLDA PCIe related data structures by rename data structure name from
  6. mc_* to plda_*.
  7. axi_base_addr is stayed in struct mc_pcie for it's microchip its own data.
  8. The event interrupt codes is still using struct mc_pcie because the event
  9. interrupt codes can not be re-used.
  10. Signed-off-by: Minda Chen <[email protected]>
  11. Reviewed-by: Conor Dooley <[email protected]>
  12. ---
  13. .../pci/controller/plda/pcie-microchip-host.c | 96 ++++++++++---------
  14. 1 file changed, 53 insertions(+), 43 deletions(-)
  15. --- a/drivers/pci/controller/plda/pcie-microchip-host.c
  16. +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
  17. @@ -22,7 +22,7 @@
  18. #include "pcie-plda.h"
  19. /* Number of MSI IRQs */
  20. -#define MC_MAX_NUM_MSI_IRQS 32
  21. +#define PLDA_MAX_NUM_MSI_IRQS 32
  22. /* PCIe Bridge Phy and Controller Phy offsets */
  23. #define MC_PCIE1_BRIDGE_ADDR 0x00008000u
  24. @@ -179,25 +179,29 @@ struct event_map {
  25. u32 event_bit;
  26. };
  27. -struct mc_msi {
  28. +struct plda_msi {
  29. struct mutex lock; /* Protect used bitmap */
  30. struct irq_domain *msi_domain;
  31. struct irq_domain *dev_domain;
  32. u32 num_vectors;
  33. u64 vector_phy;
  34. - DECLARE_BITMAP(used, MC_MAX_NUM_MSI_IRQS);
  35. + DECLARE_BITMAP(used, PLDA_MAX_NUM_MSI_IRQS);
  36. };
  37. -struct mc_pcie {
  38. - void __iomem *axi_base_addr;
  39. +struct plda_pcie_rp {
  40. struct device *dev;
  41. struct irq_domain *intx_domain;
  42. struct irq_domain *event_domain;
  43. raw_spinlock_t lock;
  44. - struct mc_msi msi;
  45. + struct plda_msi msi;
  46. void __iomem *bridge_addr;
  47. };
  48. +struct mc_pcie {
  49. + struct plda_pcie_rp plda;
  50. + void __iomem *axi_base_addr;
  51. +};
  52. +
  53. struct cause {
  54. const char *sym;
  55. const char *str;
  56. @@ -313,7 +317,7 @@ static struct mc_pcie *port;
  57. static void mc_pcie_enable_msi(struct mc_pcie *port, void __iomem *ecam)
  58. {
  59. - struct mc_msi *msi = &port->msi;
  60. + struct plda_msi *msi = &port->plda.msi;
  61. u16 reg;
  62. u8 queue_size;
  63. @@ -336,10 +340,10 @@ static void mc_pcie_enable_msi(struct mc
  64. static void mc_handle_msi(struct irq_desc *desc)
  65. {
  66. - struct mc_pcie *port = irq_desc_get_handler_data(desc);
  67. + struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
  68. struct irq_chip *chip = irq_desc_get_chip(desc);
  69. struct device *dev = port->dev;
  70. - struct mc_msi *msi = &port->msi;
  71. + struct plda_msi *msi = &port->msi;
  72. void __iomem *bridge_base_addr = port->bridge_addr;
  73. unsigned long status;
  74. u32 bit;
  75. @@ -364,7 +368,7 @@ static void mc_handle_msi(struct irq_des
  76. static void mc_msi_bottom_irq_ack(struct irq_data *data)
  77. {
  78. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  79. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  80. void __iomem *bridge_base_addr = port->bridge_addr;
  81. u32 bitpos = data->hwirq;
  82. @@ -373,7 +377,7 @@ static void mc_msi_bottom_irq_ack(struct
  83. static void mc_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  84. {
  85. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  86. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  87. phys_addr_t addr = port->msi.vector_phy;
  88. msg->address_lo = lower_32_bits(addr);
  89. @@ -400,8 +404,8 @@ static struct irq_chip mc_msi_bottom_irq
  90. static int mc_irq_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
  91. unsigned int nr_irqs, void *args)
  92. {
  93. - struct mc_pcie *port = domain->host_data;
  94. - struct mc_msi *msi = &port->msi;
  95. + struct plda_pcie_rp *port = domain->host_data;
  96. + struct plda_msi *msi = &port->msi;
  97. unsigned long bit;
  98. mutex_lock(&msi->lock);
  99. @@ -425,8 +429,8 @@ static void mc_irq_msi_domain_free(struc
  100. unsigned int nr_irqs)
  101. {
  102. struct irq_data *d = irq_domain_get_irq_data(domain, virq);
  103. - struct mc_pcie *port = irq_data_get_irq_chip_data(d);
  104. - struct mc_msi *msi = &port->msi;
  105. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(d);
  106. + struct plda_msi *msi = &port->msi;
  107. mutex_lock(&msi->lock);
  108. @@ -456,11 +460,11 @@ static struct msi_domain_info mc_msi_dom
  109. .chip = &mc_msi_irq_chip,
  110. };
  111. -static int mc_allocate_msi_domains(struct mc_pcie *port)
  112. +static int mc_allocate_msi_domains(struct plda_pcie_rp *port)
  113. {
  114. struct device *dev = port->dev;
  115. struct fwnode_handle *fwnode = of_node_to_fwnode(dev->of_node);
  116. - struct mc_msi *msi = &port->msi;
  117. + struct plda_msi *msi = &port->msi;
  118. mutex_init(&port->msi.lock);
  119. @@ -484,7 +488,7 @@ static int mc_allocate_msi_domains(struc
  120. static void mc_handle_intx(struct irq_desc *desc)
  121. {
  122. - struct mc_pcie *port = irq_desc_get_handler_data(desc);
  123. + struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
  124. struct irq_chip *chip = irq_desc_get_chip(desc);
  125. struct device *dev = port->dev;
  126. void __iomem *bridge_base_addr = port->bridge_addr;
  127. @@ -511,7 +515,7 @@ static void mc_handle_intx(struct irq_de
  128. static void mc_ack_intx_irq(struct irq_data *data)
  129. {
  130. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  131. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  132. void __iomem *bridge_base_addr = port->bridge_addr;
  133. u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
  134. @@ -520,7 +524,7 @@ static void mc_ack_intx_irq(struct irq_d
  135. static void mc_mask_intx_irq(struct irq_data *data)
  136. {
  137. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  138. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  139. void __iomem *bridge_base_addr = port->bridge_addr;
  140. unsigned long flags;
  141. u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
  142. @@ -535,7 +539,7 @@ static void mc_mask_intx_irq(struct irq_
  143. static void mc_unmask_intx_irq(struct irq_data *data)
  144. {
  145. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  146. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  147. void __iomem *bridge_base_addr = port->bridge_addr;
  148. unsigned long flags;
  149. u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
  150. @@ -625,21 +629,22 @@ static u32 local_events(struct mc_pcie *
  151. return val;
  152. }
  153. -static u32 get_events(struct mc_pcie *port)
  154. +static u32 get_events(struct plda_pcie_rp *port)
  155. {
  156. + struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
  157. u32 events = 0;
  158. - events |= pcie_events(port);
  159. - events |= sec_errors(port);
  160. - events |= ded_errors(port);
  161. - events |= local_events(port);
  162. + events |= pcie_events(mc_port);
  163. + events |= sec_errors(mc_port);
  164. + events |= ded_errors(mc_port);
  165. + events |= local_events(mc_port);
  166. return events;
  167. }
  168. static irqreturn_t mc_event_handler(int irq, void *dev_id)
  169. {
  170. - struct mc_pcie *port = dev_id;
  171. + struct plda_pcie_rp *port = dev_id;
  172. struct device *dev = port->dev;
  173. struct irq_data *data;
  174. @@ -655,7 +660,7 @@ static irqreturn_t mc_event_handler(int
  175. static void mc_handle_event(struct irq_desc *desc)
  176. {
  177. - struct mc_pcie *port = irq_desc_get_handler_data(desc);
  178. + struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
  179. unsigned long events;
  180. u32 bit;
  181. struct irq_chip *chip = irq_desc_get_chip(desc);
  182. @@ -672,12 +677,13 @@ static void mc_handle_event(struct irq_d
  183. static void mc_ack_event_irq(struct irq_data *data)
  184. {
  185. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  186. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  187. + struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
  188. u32 event = data->hwirq;
  189. void __iomem *addr;
  190. u32 mask;
  191. - addr = port->axi_base_addr + event_descs[event].base +
  192. + addr = mc_port->axi_base_addr + event_descs[event].base +
  193. event_descs[event].offset;
  194. mask = event_descs[event].mask;
  195. mask |= event_descs[event].enb_mask;
  196. @@ -687,13 +693,14 @@ static void mc_ack_event_irq(struct irq_
  197. static void mc_mask_event_irq(struct irq_data *data)
  198. {
  199. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  200. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  201. + struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
  202. u32 event = data->hwirq;
  203. void __iomem *addr;
  204. u32 mask;
  205. u32 val;
  206. - addr = port->axi_base_addr + event_descs[event].base +
  207. + addr = mc_port->axi_base_addr + event_descs[event].base +
  208. event_descs[event].mask_offset;
  209. mask = event_descs[event].mask;
  210. if (event_descs[event].enb_mask) {
  211. @@ -717,13 +724,14 @@ static void mc_mask_event_irq(struct irq
  212. static void mc_unmask_event_irq(struct irq_data *data)
  213. {
  214. - struct mc_pcie *port = irq_data_get_irq_chip_data(data);
  215. + struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
  216. + struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
  217. u32 event = data->hwirq;
  218. void __iomem *addr;
  219. u32 mask;
  220. u32 val;
  221. - addr = port->axi_base_addr + event_descs[event].base +
  222. + addr = mc_port->axi_base_addr + event_descs[event].base +
  223. event_descs[event].mask_offset;
  224. mask = event_descs[event].mask;
  225. @@ -811,7 +819,7 @@ static int mc_pcie_init_clks(struct devi
  226. return 0;
  227. }
  228. -static int mc_pcie_init_irq_domains(struct mc_pcie *port)
  229. +static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
  230. {
  231. struct device *dev = port->dev;
  232. struct device_node *node = dev->of_node;
  233. @@ -889,7 +897,7 @@ static void mc_pcie_setup_window(void __
  234. }
  235. static int mc_pcie_setup_windows(struct platform_device *pdev,
  236. - struct mc_pcie *port)
  237. + struct plda_pcie_rp *port)
  238. {
  239. void __iomem *bridge_base_addr = port->bridge_addr;
  240. struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
  241. @@ -970,7 +978,7 @@ static void mc_disable_interrupts(struct
  242. writel_relaxed(GENMASK(31, 0), bridge_base_addr + ISTATUS_HOST);
  243. }
  244. -static int mc_init_interrupts(struct platform_device *pdev, struct mc_pcie *port)
  245. +static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp *port)
  246. {
  247. struct device *dev = &pdev->dev;
  248. int irq;
  249. @@ -1043,12 +1051,12 @@ static int mc_platform_init(struct pci_c
  250. mc_pcie_enable_msi(port, cfg->win);
  251. /* Configure non-config space outbound ranges */
  252. - ret = mc_pcie_setup_windows(pdev, port);
  253. + ret = mc_pcie_setup_windows(pdev, &port->plda);
  254. if (ret)
  255. return ret;
  256. /* Address translation is up; safe to enable interrupts */
  257. - ret = mc_init_interrupts(pdev, port);
  258. + ret = mc_init_interrupts(pdev, &port->plda);
  259. if (ret)
  260. return ret;
  261. @@ -1059,6 +1067,7 @@ static int mc_host_probe(struct platform
  262. {
  263. struct device *dev = &pdev->dev;
  264. void __iomem *bridge_base_addr;
  265. + struct plda_pcie_rp *plda;
  266. int ret;
  267. u32 val;
  268. @@ -1066,7 +1075,8 @@ static int mc_host_probe(struct platform
  269. if (!port)
  270. return -ENOMEM;
  271. - port->dev = dev;
  272. + plda = &port->plda;
  273. + plda->dev = dev;
  274. port->axi_base_addr = devm_platform_ioremap_resource(pdev, 1);
  275. if (IS_ERR(port->axi_base_addr))
  276. @@ -1075,7 +1085,7 @@ static int mc_host_probe(struct platform
  277. mc_disable_interrupts(port);
  278. bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
  279. - port->bridge_addr = bridge_base_addr;
  280. + plda->bridge_addr = bridge_base_addr;
  281. /* Allow enabling MSI by disabling MSI-X */
  282. val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0);
  283. @@ -1087,10 +1097,10 @@ static int mc_host_probe(struct platform
  284. val &= NUM_MSI_MSGS_MASK;
  285. val >>= NUM_MSI_MSGS_SHIFT;
  286. - port->msi.num_vectors = 1 << val;
  287. + plda->msi.num_vectors = 1 << val;
  288. /* Pick vector address from design */
  289. - port->msi.vector_phy = readl_relaxed(bridge_base_addr + IMSI_ADDR);
  290. + plda->msi.vector_phy = readl_relaxed(bridge_base_addr + IMSI_ADDR);
  291. ret = mc_pcie_init_clks(dev);
  292. if (ret) {