0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch 6.1 KB

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  1. From 61b63cbb3526e19a0e299f95a3435a237c7c4b4b Mon Sep 17 00:00:00 2001
  2. From: Samuel Holland <[email protected]>
  3. Date: Sun, 15 May 2022 21:54:25 -0500
  4. Subject: [PATCH 30/90] mtd: nand: sunxi: Convert from fdtdec to ofnode
  5. As a first step toward converting this driver to the driver model, use
  6. the ofnode abstraction to replace direct references to the FDT blob.
  7. Using ofnode_read_u32_index removes an extra pair of loops and makes the
  8. allwinner,rb property optional, matching the devicetree binding.
  9. Signed-off-by: Samuel Holland <[email protected]>
  10. ---
  11. drivers/mtd/nand/raw/sunxi_nand.c | 73 +++++++++++--------------------
  12. include/fdtdec.h | 1 -
  13. lib/fdtdec.c | 1 -
  14. 3 files changed, 26 insertions(+), 49 deletions(-)
  15. --- a/drivers/mtd/nand/raw/sunxi_nand.c
  16. +++ b/drivers/mtd/nand/raw/sunxi_nand.c
  17. @@ -25,11 +25,10 @@
  18. */
  19. #include <common.h>
  20. -#include <fdtdec.h>
  21. +#include <dm.h>
  22. #include <malloc.h>
  23. #include <memalign.h>
  24. #include <nand.h>
  25. -#include <asm/global_data.h>
  26. #include <dm/device_compat.h>
  27. #include <dm/devres.h>
  28. #include <linux/bitops.h>
  29. @@ -45,8 +44,6 @@
  30. #include <asm/gpio.h>
  31. #include <asm/arch/clock.h>
  32. -DECLARE_GLOBAL_DATA_PTR;
  33. -
  34. #define NFC_REG_CTL 0x0000
  35. #define NFC_REG_ST 0x0004
  36. #define NFC_REG_INT 0x0008
  37. @@ -1605,19 +1602,18 @@ static int sunxi_nand_ecc_init(struct mt
  38. return 0;
  39. }
  40. -static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
  41. +static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum)
  42. {
  43. const struct nand_sdr_timings *timings;
  44. - const void *blob = gd->fdt_blob;
  45. struct sunxi_nand_chip *chip;
  46. struct mtd_info *mtd;
  47. struct nand_chip *nand;
  48. int nsels;
  49. int ret;
  50. int i;
  51. - u32 cs[8], rb[8];
  52. + u32 tmp;
  53. - if (!fdt_getprop(blob, node, "reg", &nsels))
  54. + if (!ofnode_get_property(np, "reg", &nsels))
  55. return -EINVAL;
  56. nsels /= sizeof(u32);
  57. @@ -1638,25 +1634,12 @@ static int sunxi_nand_chip_init(int node
  58. chip->selected = -1;
  59. for (i = 0; i < nsels; i++) {
  60. - cs[i] = -1;
  61. - rb[i] = -1;
  62. - }
  63. -
  64. - ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
  65. - if (ret) {
  66. - dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
  67. - return ret;
  68. - }
  69. -
  70. - ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
  71. - nsels);
  72. - if (ret) {
  73. - dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
  74. - return ret;
  75. - }
  76. -
  77. - for (i = 0; i < nsels; i++) {
  78. - int tmp = cs[i];
  79. + ret = ofnode_read_u32_index(np, "reg", i, &tmp);
  80. + if (ret) {
  81. + dev_err(nfc->dev, "could not retrieve reg property: %d\n",
  82. + ret);
  83. + return ret;
  84. + }
  85. if (tmp > NFC_MAX_CS) {
  86. dev_err(nfc->dev,
  87. @@ -1671,15 +1654,14 @@ static int sunxi_nand_chip_init(int node
  88. chip->sels[i].cs = tmp;
  89. - tmp = rb[i];
  90. - if (tmp >= 0 && tmp < 2) {
  91. + if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) &&
  92. + tmp < 2) {
  93. chip->sels[i].rb.type = RB_NATIVE;
  94. chip->sels[i].rb.info.nativeid = tmp;
  95. } else {
  96. - ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
  97. - "rb-gpios", i,
  98. - &chip->sels[i].rb.info.gpio,
  99. - GPIOD_IS_IN);
  100. + ret = gpio_request_by_name_nodev(np, "rb-gpios", i,
  101. + &chip->sels[i].rb.info.gpio,
  102. + GPIOD_IS_IN);
  103. if (ret)
  104. chip->sels[i].rb.type = RB_GPIO;
  105. else
  106. @@ -1711,7 +1693,7 @@ static int sunxi_nand_chip_init(int node
  107. * in the DT.
  108. */
  109. nand->ecc.mode = NAND_ECC_HW;
  110. - nand->flash_node = offset_to_ofnode(node);
  111. + nand->flash_node = np;
  112. nand->select_chip = sunxi_nfc_select_chip;
  113. nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
  114. nand->read_buf = sunxi_nfc_read_buf;
  115. @@ -1760,15 +1742,13 @@ static int sunxi_nand_chip_init(int node
  116. return 0;
  117. }
  118. -static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
  119. +static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc)
  120. {
  121. - const void *blob = gd->fdt_blob;
  122. - int nand_node;
  123. + ofnode nand_np;
  124. int ret, i = 0;
  125. - for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
  126. - nand_node = fdt_next_subnode(blob, nand_node)) {
  127. - ret = sunxi_nand_chip_init(nand_node, nfc, i++);
  128. + ofnode_for_each_subnode(nand_np, node) {
  129. + ret = sunxi_nand_chip_init(nand_np, nfc, i++);
  130. if (ret)
  131. return ret;
  132. }
  133. @@ -1794,10 +1774,9 @@ static void sunxi_nand_chips_cleanup(str
  134. void sunxi_nand_init(void)
  135. {
  136. - const void *blob = gd->fdt_blob;
  137. struct sunxi_nfc *nfc;
  138. - fdt_addr_t regs;
  139. - int node;
  140. + phys_addr_t regs;
  141. + ofnode node;
  142. int ret;
  143. nfc = kzalloc(sizeof(*nfc), GFP_KERNEL);
  144. @@ -1808,18 +1787,18 @@ void sunxi_nand_init(void)
  145. init_waitqueue_head(&nfc->controller.wq);
  146. INIT_LIST_HEAD(&nfc->chips);
  147. - node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND);
  148. - if (node < 0) {
  149. + node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand");
  150. + if (!ofnode_valid(node)) {
  151. pr_err("unable to find nfc node in device tree\n");
  152. goto err;
  153. }
  154. - if (!fdtdec_get_is_enabled(blob, node)) {
  155. + if (!ofnode_is_enabled(node)) {
  156. pr_err("nfc disabled in device tree\n");
  157. goto err;
  158. }
  159. - regs = fdtdec_get_addr(blob, node, "reg");
  160. + regs = ofnode_get_addr(node);
  161. if (regs == FDT_ADDR_T_NONE) {
  162. pr_err("unable to find nfc address in device tree\n");
  163. goto err;
  164. --- a/include/fdtdec.h
  165. +++ b/include/fdtdec.h
  166. @@ -187,7 +187,6 @@ enum fdt_compat_id {
  167. COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
  168. COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
  169. COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
  170. - COMPAT_SUNXI_NAND, /* SUNXI NAND controller */
  171. COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */
  172. COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */
  173. COMPAT_ALTERA_SOCFPGA_H2F_BRG, /* SoCFPGA hps2fpga bridge */
  174. --- a/lib/fdtdec.c
  175. +++ b/lib/fdtdec.c
  176. @@ -64,7 +64,6 @@ static const char * const compat_names[C
  177. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  178. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  179. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  180. - COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  181. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  182. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  183. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),