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0049-gpio-axp-Use-DM_PMIC-functions-for-register-access.patch 2.8 KB

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  1. From 532b81ac600b6a70a1421f86503cb6d8543edf1b Mon Sep 17 00:00:00 2001
  2. From: Samuel Holland <[email protected]>
  3. Date: Tue, 17 Aug 2021 20:01:55 -0500
  4. Subject: [PATCH 49/90] gpio: axp: Use DM_PMIC functions for register access
  5. Now that the PMIC driver implements the DM_PMIC uclass, those functions
  6. can be used instead of the platform-specific "pmic_bus" functions.
  7. Since the driver still uses the single set of register definitions from
  8. axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those
  9. choices, and therefore also AXP_PMIC_BUS.
  10. Signed-off-by: Samuel Holland <[email protected]>
  11. ---
  12. drivers/gpio/axp_gpio.c | 27 ++++++++++++---------------
  13. 1 file changed, 12 insertions(+), 15 deletions(-)
  14. --- a/drivers/gpio/axp_gpio.c
  15. +++ b/drivers/gpio/axp_gpio.c
  16. @@ -6,11 +6,11 @@
  17. */
  18. #include <common.h>
  19. -#include <asm/arch/pmic_bus.h>
  20. #include <asm/gpio.h>
  21. #include <axp_pmic.h>
  22. #include <dm.h>
  23. #include <errno.h>
  24. +#include <power/pmic.h>
  25. #define AXP_GPIO_PREFIX "AXP0-"
  26. #define AXP_GPIO_COUNT 4
  27. @@ -40,7 +40,7 @@ static int axp_gpio_direction_input(stru
  28. if (reg == 0)
  29. return -EINVAL;
  30. - return pmic_bus_write(reg, AXP_GPIO_CTRL_INPUT);
  31. + return pmic_reg_write(dev->parent, reg, AXP_GPIO_CTRL_INPUT);
  32. }
  33. static int axp_gpio_direction_output(struct udevice *dev, unsigned pin,
  34. @@ -52,26 +52,27 @@ static int axp_gpio_direction_output(str
  35. if (reg == 0)
  36. return -EINVAL;
  37. - return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
  38. - AXP_GPIO_CTRL_OUTPUT_LOW);
  39. + return pmic_reg_write(dev->parent, reg,
  40. + val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
  41. + AXP_GPIO_CTRL_OUTPUT_LOW);
  42. }
  43. static int axp_gpio_get_value(struct udevice *dev, unsigned pin)
  44. {
  45. - u8 reg, val, mask;
  46. + u8 reg, mask;
  47. int ret;
  48. reg = axp_get_gpio_ctrl_reg(pin);
  49. if (reg == 0)
  50. return -EINVAL;
  51. - ret = pmic_bus_read(AXP_GPIO_STATE, &val);
  52. - if (ret)
  53. + ret = pmic_reg_read(dev->parent, AXP_GPIO_STATE);
  54. + if (ret < 0)
  55. return ret;
  56. mask = 1 << (pin + AXP_GPIO_STATE_OFFSET);
  57. - return (val & mask) ? 1 : 0;
  58. + return (ret & mask) ? 1 : 0;
  59. }
  60. static int axp_gpio_set_value(struct udevice *dev, unsigned pin, int val)
  61. @@ -82,8 +83,9 @@ static int axp_gpio_set_value(struct ude
  62. if (reg == 0)
  63. return -EINVAL;
  64. - return pmic_bus_write(reg, val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
  65. - AXP_GPIO_CTRL_OUTPUT_LOW);
  66. + return pmic_reg_write(dev->parent, reg,
  67. + val ? AXP_GPIO_CTRL_OUTPUT_HIGH :
  68. + AXP_GPIO_CTRL_OUTPUT_LOW);
  69. }
  70. static const struct dm_gpio_ops axp_gpio_ops = {
  71. @@ -96,11 +98,6 @@ static const struct dm_gpio_ops axp_gpio
  72. static int axp_gpio_probe(struct udevice *dev)
  73. {
  74. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  75. - int ret;
  76. -
  77. - ret = pmic_bus_init();
  78. - if (ret)
  79. - return ret;
  80. /* Tell the uclass how many GPIOs we have */
  81. uc_priv->bank_name = AXP_GPIO_PREFIX;