0088-sunxi-riscv-Copy-in-WIP-version-of-devicetrees.patch 28 KB

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  1. From 197d4096c697bcde8f9833b1d04b17eb2b232b85 Mon Sep 17 00:00:00 2001
  2. From: Samuel Holland <[email protected]>
  3. Date: Mon, 31 Oct 2022 22:59:00 -0500
  4. Subject: [PATCH 88/90] sunxi: riscv: Copy in WIP version of devicetrees
  5. While the bindings still are not stable, this should help things work
  6. out of the box.
  7. Signed-off-by: Samuel Holland <[email protected]>
  8. ---
  9. .../riscv/dts/sun20i-d1-clockworkpi-v3.14.dts | 134 +++++++-
  10. .../dts/sun20i-d1-common-regulators.dtsi | 13 +
  11. arch/riscv/dts/sun20i-d1-devterm-v3.14.dts | 16 +
  12. .../dts/sun20i-d1-dongshan-nezha-stu.dts | 48 ++-
  13. .../dts/sun20i-d1-lichee-rv-86-panel-480p.dts | 51 +++
  14. .../dts/sun20i-d1-lichee-rv-86-panel.dtsi | 64 ++++
  15. arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts | 98 ++++++
  16. arch/riscv/dts/sun20i-d1-lichee-rv.dts | 6 +
  17. arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts | 41 +++
  18. arch/riscv/dts/sun20i-d1-nezha.dts | 117 ++++++-
  19. arch/riscv/dts/sun20i-d1.dtsi | 314 +++++++++++++++++-
  20. 11 files changed, 881 insertions(+), 21 deletions(-)
  21. --- a/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts
  22. +++ b/arch/riscv/dts/sun20i-d1-clockworkpi-v3.14.dts
  23. @@ -22,16 +22,78 @@
  24. stdout-path = "serial0:115200n8";
  25. };
  26. + audio_amplifier: audio-amplifier {
  27. + compatible = "simple-audio-amplifier";
  28. + enable-gpios = <&pio 4 1 GPIO_ACTIVE_HIGH>; /* PE1/GPIO11 */
  29. + sound-name-prefix = "Amplifier";
  30. + VCC-supply = <&reg_vcc>;
  31. + };
  32. +
  33. + /*
  34. + * FIXME: This is not really an amplifier, but the amplifier binding
  35. + * has the needed properties and behavior.
  36. + */
  37. + audio_switch: audio-switch {
  38. + compatible = "simple-audio-amplifier";
  39. + enable-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2/AUD_SWITCH */
  40. + sound-name-prefix = "Switch";
  41. + VCC-supply = <&reg_aldo1>;
  42. + };
  43. +
  44. + backlight: backlight {
  45. + compatible = "pwm-backlight";
  46. + power-supply = <&reg_vcc>;
  47. + pwms = <&pwm 4 50000 0>; /* PD20/GPIO9 */
  48. + };
  49. +
  50. + bt_sco_codec: bt-sco-codec {
  51. + #sound-dai-cells = <0>;
  52. + compatible = "linux,bt-sco";
  53. + };
  54. +
  55. + bt-sound {
  56. + compatible = "simple-audio-card";
  57. + simple-audio-card,name = "Bluetooth";
  58. + #address-cells = <1>;
  59. + #size-cells = <0>;
  60. +
  61. + simple-audio-card,dai-link@0 {
  62. + format = "dsp_a";
  63. + frame-master = <&bt_sound_cpu>;
  64. + bitclock-master = <&bt_sound_cpu>;
  65. +
  66. + bt_sound_cpu: cpu {
  67. + sound-dai = <&i2s1>;
  68. + };
  69. +
  70. + codec {
  71. + sound-dai = <&bt_sco_codec>;
  72. + };
  73. + };
  74. + };
  75. +
  76. + hdmi_connector: connector {
  77. + compatible = "hdmi-connector";
  78. + type = "d";
  79. +
  80. + port {
  81. + hdmi_connector_in: endpoint {
  82. + remote-endpoint = <&hdmi_out_connector>;
  83. + };
  84. + };
  85. + };
  86. +
  87. /*
  88. * This regulator is PWM-controlled, but the PWM controller is not
  89. * yet supported, so fix the regulator to its default voltage.
  90. */
  91. reg_vdd_cpu: vdd-cpu {
  92. - compatible = "regulator-fixed";
  93. + compatible = "pwm-regulator";
  94. + pwms = <&pwm 0 50000 0>;
  95. + pwm-supply = <&reg_vcc>;
  96. regulator-name = "vdd-cpu";
  97. - regulator-min-microvolt = <1100000>;
  98. - regulator-max-microvolt = <1100000>;
  99. - vin-supply = <&reg_vcc>;
  100. + regulator-min-microvolt = <810000>;
  101. + regulator-max-microvolt = <1160000>;
  102. };
  103. wifi_pwrseq: wifi-pwrseq {
  104. @@ -40,14 +102,51 @@
  105. };
  106. };
  107. +&codec {
  108. + aux-devs = <&audio_amplifier>, <&audio_switch>;
  109. + hp-det-gpio = <&pio 1 12 GPIO_ACTIVE_HIGH>; /* PB12/GPIO10 */
  110. + pin-switches = "Internal Speakers";
  111. + routing = "Internal Speakers", "Amplifier OUTL",
  112. + "Internal Speakers", "Amplifier OUTR",
  113. + "Amplifier INL", "Switch OUTL",
  114. + "Amplifier INR", "Switch OUTR",
  115. + "Headphone Jack", "Switch OUTL",
  116. + "Headphone Jack", "Switch OUTR",
  117. + "Switch INL", "HPOUTL",
  118. + "Switch INR", "HPOUTR",
  119. + "MICIN3", "Headset Microphone",
  120. + "Headset Microphone", "HBIAS";
  121. + widgets = "Microphone", "Headset Microphone",
  122. + "Headphone", "Headphone Jack",
  123. + "Speaker", "Internal Speakers";
  124. +};
  125. +
  126. &cpu0 {
  127. cpu-supply = <&reg_vdd_cpu>;
  128. };
  129. +&de {
  130. + status = "okay";
  131. +};
  132. +
  133. &ehci1 {
  134. status = "okay";
  135. };
  136. +&hdmi {
  137. + status = "okay";
  138. +};
  139. +
  140. +&hdmi_out {
  141. + hdmi_out_connector: endpoint {
  142. + remote-endpoint = <&hdmi_connector_in>;
  143. + };
  144. +};
  145. +
  146. +&hdmi_phy {
  147. + status = "okay";
  148. +};
  149. +
  150. &i2c0 {
  151. pinctrl-0 = <&i2c0_pb10_pins>;
  152. pinctrl-names = "default";
  153. @@ -169,6 +268,12 @@
  154. };
  155. };
  156. +&i2s1 {
  157. + pinctrl-0 = <&i2s1_clk_pins>, <&i2s1_din_pin>, <&i2s1_dout_pin>;
  158. + pinctrl-names = "default";
  159. + status = "okay";
  160. +};
  161. +
  162. &mmc0 {
  163. broken-cd;
  164. bus-width = <4>;
  165. @@ -205,6 +310,27 @@
  166. &pio {
  167. vcc-pg-supply = <&reg_ldoa>;
  168. +
  169. + i2s1_clk_pins: i2s1-clk-pins {
  170. + pins = "PG12", "PG13";
  171. + function = "i2s1";
  172. + };
  173. +
  174. + i2s1_din_pin: i2s1-din-pin {
  175. + pins = "PG14";
  176. + function = "i2s1_din";
  177. + };
  178. +
  179. + i2s1_dout_pin: i2s1-dout-pin {
  180. + pins = "PG15";
  181. + function = "i2s1_dout";
  182. + };
  183. +};
  184. +
  185. +&pwm {
  186. + pinctrl-0 = <&pwm0_pd16_pin>, <&pwm4_pd20_pin>;
  187. + pinctrl-names = "default";
  188. + status = "okay";
  189. };
  190. &uart0 {
  191. --- a/arch/riscv/dts/sun20i-d1-common-regulators.dtsi
  192. +++ b/arch/riscv/dts/sun20i-d1-common-regulators.dtsi
  193. @@ -18,6 +18,15 @@
  194. };
  195. };
  196. +&codec {
  197. + avcc-supply = <&reg_aldo>;
  198. + hpvcc-supply = <&reg_hpldo>;
  199. +};
  200. +
  201. +&hdmi {
  202. + hvcc-supply = <&reg_ldoa>;
  203. +};
  204. +
  205. &lradc {
  206. vref-supply = <&reg_aldo>;
  207. };
  208. @@ -49,3 +58,7 @@
  209. regulator-max-microvolt = <1800000>;
  210. ldo-in-supply = <&reg_vcc_3v3>;
  211. };
  212. +
  213. +&ths {
  214. + vref-supply = <&reg_aldo>;
  215. +};
  216. --- a/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts
  217. +++ b/arch/riscv/dts/sun20i-d1-devterm-v3.14.dts
  218. @@ -35,3 +35,19 @@
  219. };
  220. };
  221. };
  222. +
  223. +&dsi {
  224. + pinctrl-0 = <&dsi_4lane_pins>;
  225. + pinctrl-names = "default";
  226. + status = "okay";
  227. +
  228. + panel@0 {
  229. + compatible = "clockwork,cwd686";
  230. + reg = <0>;
  231. + backlight = <&backlight>;
  232. + reset-gpios = <&pio 3 19 GPIO_ACTIVE_LOW>; /* PD19/GPIO8 */
  233. + rotation = <90>;
  234. + iovcc-supply = <&reg_dcdc3>;
  235. + vci-supply = <&reg_aldo2>;
  236. + };
  237. +};
  238. --- a/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts
  239. +++ b/arch/riscv/dts/sun20i-d1-dongshan-nezha-stu.dts
  240. @@ -23,6 +23,17 @@
  241. stdout-path = "serial0:115200n8";
  242. };
  243. + hdmi_connector: connector {
  244. + compatible = "hdmi-connector";
  245. + type = "a";
  246. +
  247. + port {
  248. + hdmi_connector_in: endpoint {
  249. + remote-endpoint = <&hdmi_out_connector>;
  250. + };
  251. + };
  252. + };
  253. +
  254. leds {
  255. compatible = "gpio-leds";
  256. @@ -43,16 +54,13 @@
  257. vin-supply = <&reg_vcc>;
  258. };
  259. - /*
  260. - * This regulator is PWM-controlled, but the PWM controller is not
  261. - * yet supported, so fix the regulator to its default voltage.
  262. - */
  263. reg_vdd_cpu: vdd-cpu {
  264. - compatible = "regulator-fixed";
  265. + compatible = "pwm-regulator";
  266. + pwms = <&pwm 0 50000 0>;
  267. + pwm-supply = <&reg_vcc>;
  268. regulator-name = "vdd-cpu";
  269. - regulator-min-microvolt = <1100000>;
  270. - regulator-max-microvolt = <1100000>;
  271. - vin-supply = <&reg_vcc>;
  272. + regulator-min-microvolt = <810000>;
  273. + regulator-max-microvolt = <1160000>;
  274. };
  275. };
  276. @@ -60,6 +68,10 @@
  277. cpu-supply = <&reg_vdd_cpu>;
  278. };
  279. +&de {
  280. + status = "okay";
  281. +};
  282. +
  283. &ehci0 {
  284. status = "okay";
  285. };
  286. @@ -73,6 +85,20 @@
  287. status = "okay";
  288. };
  289. +&hdmi {
  290. + status = "okay";
  291. +};
  292. +
  293. +&hdmi_out {
  294. + hdmi_out_connector: endpoint {
  295. + remote-endpoint = <&hdmi_connector_in>;
  296. + };
  297. +};
  298. +
  299. +&hdmi_phy {
  300. + status = "okay";
  301. +};
  302. +
  303. &mdio {
  304. ext_rgmii_phy: ethernet-phy@1 {
  305. compatible = "ethernet-phy-ieee802.3-c22";
  306. @@ -95,6 +121,12 @@
  307. status = "okay";
  308. };
  309. +&pwm {
  310. + pinctrl-0 = <&pwm0_pd16_pin>;
  311. + pinctrl-names = "default";
  312. + status = "okay";
  313. +};
  314. +
  315. &uart0 {
  316. pinctrl-0 = <&uart0_pb8_pins>;
  317. pinctrl-names = "default";
  318. --- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts
  319. +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel-480p.dts
  320. @@ -7,6 +7,40 @@
  321. model = "Sipeed Lichee RV 86 Panel (480p)";
  322. compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
  323. "allwinner,sun20i-d1";
  324. +
  325. + backlight: backlight {
  326. + compatible = "pwm-backlight";
  327. + power-supply = <&reg_vcc>;
  328. + pwms = <&pwm 7 50000 0>;
  329. + };
  330. +
  331. + spi {
  332. + compatible = "spi-gpio";
  333. + cs-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
  334. + mosi-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
  335. + sck-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
  336. + num-chipselects = <1>;
  337. + #address-cells = <1>;
  338. + #size-cells = <0>;
  339. +
  340. + panel@0 {
  341. + compatible = "sitronix,st7701s";
  342. + reg = <0>;
  343. + backlight = <&backlight>;
  344. + reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */
  345. + spi-3wire;
  346. +
  347. + port {
  348. + panel_in_tcon_lcd0: endpoint {
  349. + remote-endpoint = <&tcon_lcd0_out_panel>;
  350. + };
  351. + };
  352. + };
  353. + };
  354. +};
  355. +
  356. +&de {
  357. + status = "okay";
  358. };
  359. &i2c2 {
  360. @@ -27,3 +61,20 @@
  361. wakeup-source;
  362. };
  363. };
  364. +
  365. +&pwm {
  366. + pinctrl-0 = <&pwm7_pd22_pin>;
  367. + pinctrl-names = "default";
  368. + status = "okay";
  369. +};
  370. +
  371. +&tcon_lcd0 {
  372. + pinctrl-0 = <&lcd_rgb666_pins>;
  373. + pinctrl-names = "default";
  374. +};
  375. +
  376. +&tcon_lcd0_out {
  377. + tcon_lcd0_out_panel: endpoint {
  378. + remote-endpoint = <&panel_in_tcon_lcd0>;
  379. + };
  380. +};
  381. --- a/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi
  382. +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-86-panel.dtsi
  383. @@ -9,6 +9,39 @@
  384. ethernet1 = &xr829;
  385. };
  386. + audio_amplifier: audio-amplifier {
  387. + compatible = "simple-audio-amplifier";
  388. + enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
  389. + sound-name-prefix = "Amplifier";
  390. + };
  391. +
  392. + dmic_codec: dmic-codec {
  393. + compatible = "dmic-codec";
  394. + num-channels = <2>;
  395. + #sound-dai-cells = <0>;
  396. + };
  397. +
  398. + dmic-sound {
  399. + compatible = "simple-audio-card";
  400. + simple-audio-card,name = "DMIC";
  401. + #address-cells = <1>;
  402. + #size-cells = <0>;
  403. +
  404. + simple-audio-card,dai-link@0 {
  405. + format = "pdm";
  406. + frame-master = <&link0_cpu>;
  407. + bitclock-master = <&link0_cpu>;
  408. +
  409. + link0_cpu: cpu {
  410. + sound-dai = <&dmic>;
  411. + };
  412. +
  413. + link0_codec: codec {
  414. + sound-dai = <&dmic_codec>;
  415. + };
  416. + };
  417. + };
  418. +
  419. /* PC1 is repurposed as BT_WAKE_AP */
  420. /delete-node/ leds;
  421. @@ -24,6 +57,27 @@
  422. };
  423. };
  424. +&codec {
  425. + aux-devs = <&audio_amplifier>;
  426. + routing = "Internal Speaker", "Amplifier OUTL",
  427. + "Internal Speaker", "Amplifier OUTR",
  428. + "Amplifier INL", "HPOUTL",
  429. + "Amplifier INR", "HPOUTR",
  430. + "LINEINL", "HPOUTL",
  431. + "LINEINR", "HPOUTR",
  432. + "MICIN3", "Internal Microphone",
  433. + "Internal Microphone", "HBIAS";
  434. + widgets = "Microphone", "Internal Microphone",
  435. + "Speaker", "Internal Speaker";
  436. + status = "okay";
  437. +};
  438. +
  439. +&dmic {
  440. + pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
  441. + pinctrl-names = "default";
  442. + status = "okay";
  443. +};
  444. +
  445. &ehci1 {
  446. status = "okay";
  447. };
  448. @@ -69,6 +123,16 @@
  449. pins = "PG11";
  450. function = "clk";
  451. };
  452. +
  453. + dmic_pb11_d0_pin: dmic-pb11-d0-pin {
  454. + pins = "PB11";
  455. + function = "dmic";
  456. + };
  457. +
  458. + dmic_pe17_clk_pin: dmic-pe17-clk-pin {
  459. + pins = "PE17";
  460. + function = "dmic";
  461. + };
  462. };
  463. &uart1 {
  464. --- a/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
  465. +++ b/arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
  466. @@ -15,16 +15,102 @@
  467. ethernet1 = &rtl8723ds;
  468. };
  469. + dmic_codec: dmic-codec {
  470. + compatible = "dmic-codec";
  471. + num-channels = <2>;
  472. + #sound-dai-cells = <0>;
  473. + };
  474. +
  475. + dmic-sound {
  476. + compatible = "simple-audio-card";
  477. + simple-audio-card,name = "DMIC";
  478. + #address-cells = <1>;
  479. + #size-cells = <0>;
  480. +
  481. + simple-audio-card,dai-link@0 {
  482. + format = "pdm";
  483. + frame-master = <&link0_cpu>;
  484. + bitclock-master = <&link0_cpu>;
  485. +
  486. + link0_cpu: cpu {
  487. + sound-dai = <&dmic>;
  488. + };
  489. +
  490. + link0_codec: codec {
  491. + sound-dai = <&dmic_codec>;
  492. + };
  493. + };
  494. + };
  495. +
  496. + hdmi_connector: connector {
  497. + compatible = "hdmi-connector";
  498. + type = "a";
  499. +
  500. + port {
  501. + hdmi_connector_in: endpoint {
  502. + remote-endpoint = <&hdmi_out_connector>;
  503. + };
  504. + };
  505. + };
  506. +
  507. wifi_pwrseq: wifi-pwrseq {
  508. compatible = "mmc-pwrseq-simple";
  509. reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
  510. };
  511. };
  512. +&codec {
  513. + routing = "Internal Speaker", "HPOUTL",
  514. + "Internal Speaker", "HPOUTR",
  515. + "LINEINL", "HPOUTL",
  516. + "LINEINR", "HPOUTR",
  517. + "MICIN3", "Internal Microphone",
  518. + "Internal Microphone", "HBIAS";
  519. + widgets = "Microphone", "Internal Microphone",
  520. + "Speaker", "Internal Speaker";
  521. + status = "okay";
  522. +};
  523. +
  524. +&de {
  525. + status = "okay";
  526. +};
  527. +
  528. +&dmic {
  529. + pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
  530. + pinctrl-names = "default";
  531. + status = "okay";
  532. +};
  533. +
  534. &ehci1 {
  535. status = "okay";
  536. };
  537. +&hdmi {
  538. + status = "okay";
  539. +};
  540. +
  541. +&hdmi_out {
  542. + hdmi_out_connector: endpoint {
  543. + remote-endpoint = <&hdmi_connector_in>;
  544. + };
  545. +};
  546. +
  547. +&hdmi_phy {
  548. + status = "okay";
  549. +};
  550. +
  551. +&ledc {
  552. + pinctrl-0 = <&ledc_pc0_pin>;
  553. + pinctrl-names = "default";
  554. + status = "okay";
  555. +
  556. + multi-led@0 {
  557. + reg = <0x0>;
  558. + color = <LED_COLOR_ID_RGB>;
  559. + function = LED_FUNCTION_STATUS;
  560. + };
  561. +};
  562. +
  563. &lradc {
  564. status = "okay";
  565. @@ -55,6 +141,18 @@
  566. status = "okay";
  567. };
  568. +&pio {
  569. + dmic_pb11_d0_pin: dmic-pb11-d0-pin {
  570. + pins = "PB11";
  571. + function = "dmic";
  572. + };
  573. +
  574. + dmic_pe17_clk_pin: dmic-pe17-clk-pin {
  575. + pins = "PE17";
  576. + function = "dmic";
  577. + };
  578. +};
  579. +
  580. &uart1 {
  581. uart-has-rtscts;
  582. pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
  583. --- a/arch/riscv/dts/sun20i-d1-lichee-rv.dts
  584. +++ b/arch/riscv/dts/sun20i-d1-lichee-rv.dts
  585. @@ -65,6 +65,12 @@
  586. status = "okay";
  587. };
  588. +&spi0 {
  589. + pinctrl-0 = <&spi0_pins>;
  590. + pinctrl-names = "default";
  591. + status = "okay";
  592. +};
  593. +
  594. &uart0 {
  595. pinctrl-0 = <&uart0_pb8_pins>;
  596. pinctrl-names = "default";
  597. --- a/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts
  598. +++ b/arch/riscv/dts/sun20i-d1-mangopi-mq-pro.dts
  599. @@ -4,6 +4,7 @@
  600. /dts-v1/;
  601. #include <dt-bindings/gpio/gpio.h>
  602. +#include <dt-bindings/leds/common.h>
  603. #include "sun20i-d1.dtsi"
  604. #include "sun20i-d1-common-regulators.dtsi"
  605. @@ -22,6 +23,28 @@
  606. stdout-path = "serial0:115200n8";
  607. };
  608. + hdmi_connector: connector {
  609. + compatible = "hdmi-connector";
  610. + type = "c";
  611. +
  612. + port {
  613. + hdmi_connector_in: endpoint {
  614. + remote-endpoint = <&hdmi_out_connector>;
  615. + };
  616. + };
  617. + };
  618. +
  619. + leds {
  620. + compatible = "pwm-leds";
  621. +
  622. + led {
  623. + color = <LED_COLOR_ID_BLUE>;
  624. + function = LED_FUNCTION_STATUS;
  625. + max-brightness = <255>;
  626. + pwms = <&pwm 2 50000 0>;
  627. + };
  628. + };
  629. +
  630. reg_avdd2v8: avdd2v8 {
  631. compatible = "regulator-fixed";
  632. regulator-name = "avdd2v8";
  633. @@ -56,10 +79,28 @@
  634. cpu-supply = <&reg_vdd_cpu>;
  635. };
  636. +&de {
  637. + status = "okay";
  638. +};
  639. +
  640. &ehci1 {
  641. status = "okay";
  642. };
  643. +&hdmi {
  644. + status = "okay";
  645. +};
  646. +
  647. +&hdmi_out {
  648. + hdmi_out_connector: endpoint {
  649. + remote-endpoint = <&hdmi_connector_in>;
  650. + };
  651. +};
  652. +
  653. +&hdmi_phy {
  654. + status = "okay";
  655. +};
  656. +
  657. &mmc0 {
  658. bus-width = <4>;
  659. cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
  660. --- a/arch/riscv/dts/sun20i-d1-nezha.dts
  661. +++ b/arch/riscv/dts/sun20i-d1-nezha.dts
  662. @@ -5,6 +5,7 @@
  663. #include <dt-bindings/gpio/gpio.h>
  664. #include <dt-bindings/input/input.h>
  665. +#include <dt-bindings/leds/common.h>
  666. #include "sun20i-d1.dtsi"
  667. #include "sun20i-d1-common-regulators.dtsi"
  668. @@ -18,12 +19,24 @@
  669. ethernet1 = &xr829;
  670. mmc0 = &mmc0;
  671. serial0 = &uart0;
  672. + spi0 = &spi0;
  673. };
  674. chosen {
  675. stdout-path = "serial0:115200n8";
  676. };
  677. + hdmi_connector: connector {
  678. + compatible = "hdmi-connector";
  679. + type = "a";
  680. +
  681. + port {
  682. + hdmi_connector_in: endpoint {
  683. + remote-endpoint = <&hdmi_out_connector>;
  684. + };
  685. + };
  686. + };
  687. +
  688. reg_usbvbus: usbvbus {
  689. compatible = "regulator-fixed";
  690. regulator-name = "usbvbus";
  691. @@ -34,16 +47,13 @@
  692. vin-supply = <&reg_vcc>;
  693. };
  694. - /*
  695. - * This regulator is PWM-controlled, but the PWM controller is not
  696. - * yet supported, so fix the regulator to its default voltage.
  697. - */
  698. reg_vdd_cpu: vdd-cpu {
  699. - compatible = "regulator-fixed";
  700. + compatible = "pwm-regulator";
  701. + pwms = <&pwm 0 50000 0>;
  702. + pwm-supply = <&reg_vcc>;
  703. regulator-name = "vdd-cpu";
  704. - regulator-min-microvolt = <1100000>;
  705. - regulator-max-microvolt = <1100000>;
  706. - vin-supply = <&reg_vcc>;
  707. + regulator-min-microvolt = <810000>;
  708. + regulator-max-microvolt = <1160000>;
  709. };
  710. wifi_pwrseq: wifi-pwrseq {
  711. @@ -52,10 +62,26 @@
  712. };
  713. };
  714. +&codec {
  715. + routing = "Headphone Jack", "HPOUTL",
  716. + "Headphone Jack", "HPOUTR",
  717. + "LINEINL", "HPOUTL",
  718. + "LINEINR", "HPOUTR",
  719. + "MICIN3", "Headset Microphone",
  720. + "Headset Microphone", "HBIAS";
  721. + widgets = "Microphone", "Headset Microphone",
  722. + "Headphone", "Headphone Jack";
  723. + status = "okay";
  724. +};
  725. +
  726. &cpu0 {
  727. cpu-supply = <&reg_vdd_cpu>;
  728. };
  729. +&de {
  730. + status = "okay";
  731. +};
  732. +
  733. &ehci0 {
  734. status = "okay";
  735. };
  736. @@ -73,6 +99,20 @@
  737. status = "okay";
  738. };
  739. +&hdmi {
  740. + status = "okay";
  741. +};
  742. +
  743. +&hdmi_out {
  744. + hdmi_out_connector: endpoint {
  745. + remote-endpoint = <&hdmi_connector_in>;
  746. + };
  747. +};
  748. +
  749. +&hdmi_phy {
  750. + status = "okay";
  751. +};
  752. +
  753. &i2c2 {
  754. pinctrl-0 = <&i2c2_pb0_pins>;
  755. pinctrl-names = "default";
  756. @@ -90,6 +130,18 @@
  757. };
  758. };
  759. +&ledc {
  760. + pinctrl-0 = <&ledc_pc0_pin>;
  761. + pinctrl-names = "default";
  762. + status = "okay";
  763. +
  764. + multi-led@0 {
  765. + reg = <0x0>;
  766. + color = <LED_COLOR_ID_RGB>;
  767. + function = LED_FUNCTION_STATUS;
  768. + };
  769. +};
  770. +
  771. &lradc {
  772. status = "okay";
  773. @@ -142,6 +194,55 @@
  774. status = "okay";
  775. };
  776. +&pwm {
  777. + pinctrl-0 = <&pwm0_pd16_pin>;
  778. + pinctrl-names = "default";
  779. + status = "okay";
  780. +};
  781. +
  782. +&spi0 {
  783. + pinctrl-0 = <&spi0_pins>;
  784. + pinctrl-names = "default";
  785. + status = "okay";
  786. +
  787. + flash@0 {
  788. + compatible = "spi-nand";
  789. + reg = <0>;
  790. +
  791. + partitions {
  792. + compatible = "fixed-partitions";
  793. + #address-cells = <1>;
  794. + #size-cells = <1>;
  795. +
  796. + partition@0 {
  797. + label = "boot0";
  798. + reg = <0x00000000 0x00100000>;
  799. + };
  800. +
  801. + partition@100000 {
  802. + label = "uboot";
  803. + reg = <0x00100000 0x00300000>;
  804. + };
  805. +
  806. + partition@400000 {
  807. + label = "secure_storage";
  808. + reg = <0x00400000 0x00100000>;
  809. + };
  810. +
  811. + partition@500000 {
  812. + label = "sys";
  813. + reg = <0x00500000 0x0fb00000>;
  814. + };
  815. + };
  816. + };
  817. +};
  818. +
  819. +&spi1 {
  820. + pinctrl-0 = <&spi1_pd_pins>;
  821. + pinctrl-names = "default";
  822. + status = "okay";
  823. +};
  824. +
  825. &uart0 {
  826. pinctrl-0 = <&uart0_pb8_pins>;
  827. pinctrl-names = "default";
  828. --- a/arch/riscv/dts/sun20i-d1.dtsi
  829. +++ b/arch/riscv/dts/sun20i-d1.dtsi
  830. @@ -59,6 +59,35 @@
  831. #clock-cells = <0>;
  832. };
  833. + thermal-zones {
  834. + cpu-thermal {
  835. + polling-delay = <0>;
  836. + polling-delay-passive = <0>;
  837. + thermal-sensors = <&ths>;
  838. +
  839. + trips {
  840. + cpu_target: cpu-target {
  841. + hysteresis = <3000>;
  842. + temperature = <85000>;
  843. + type = "passive";
  844. + };
  845. +
  846. + cpu-crit {
  847. + hysteresis = <0>;
  848. + temperature = <110000>;
  849. + type = "critical";
  850. + };
  851. + };
  852. +
  853. + cooling-maps {
  854. + map0 {
  855. + trip = <&cpu_target>;
  856. + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  857. + };
  858. + };
  859. + };
  860. + };
  861. +
  862. soc {
  863. compatible = "simple-bus";
  864. ranges;
  865. @@ -95,6 +124,14 @@
  866. #interrupt-cells = <3>;
  867. /omit-if-no-ref/
  868. + dsi_4lane_pins: dsi-4lane-pins {
  869. + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
  870. + "PD6", "PD7", "PD8", "PD9";
  871. + drive-strength = <30>;
  872. + function = "dsi";
  873. + };
  874. +
  875. + /omit-if-no-ref/
  876. i2c0_pb10_pins: i2c0-pb10-pins {
  877. pins = "PB10", "PB11";
  878. function = "i2c0";
  879. @@ -116,6 +153,12 @@
  880. };
  881. /omit-if-no-ref/
  882. + ledc_pc0_pin: ledc-pc0-pin {
  883. + pins = "PC0";
  884. + function = "ledc";
  885. + };
  886. +
  887. + /omit-if-no-ref/
  888. mmc0_pins: mmc0-pins {
  889. pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  890. function = "mmc0";
  891. @@ -149,6 +192,48 @@
  892. };
  893. /omit-if-no-ref/
  894. + pwm0_pd16_pin: pwm0-pd16-pin {
  895. + pins = "PD16";
  896. + function = "pwm0";
  897. + };
  898. +
  899. + /omit-if-no-ref/
  900. + pwm2_pd18_pin: pwm2-pd18-pin {
  901. + pins = "PD18";
  902. + function = "pwm2";
  903. + };
  904. +
  905. + /omit-if-no-ref/
  906. + pwm4_pd20_pin: pwm4-pd20-pin {
  907. + pins = "PD20";
  908. + function = "pwm4";
  909. + };
  910. +
  911. + /omit-if-no-ref/
  912. + pwm7_pd22_pin: pwm7-pd22-pin {
  913. + pins = "PD22";
  914. + function = "pwm7";
  915. + };
  916. +
  917. + /omit-if-no-ref/
  918. + spi0_pins: spi0-pins {
  919. + pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7";
  920. + function = "spi0";
  921. + };
  922. +
  923. + /omit-if-no-ref/
  924. + spi1_pb_pins: spi1-pb-pins {
  925. + pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12";
  926. + function = "spi1";
  927. + };
  928. +
  929. + /omit-if-no-ref/
  930. + spi1_pd_pins: spi1-pd-pins {
  931. + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15";
  932. + function = "spi1";
  933. + };
  934. +
  935. + /omit-if-no-ref/
  936. uart0_pb8_pins: uart0-pb8-pins {
  937. pins = "PB8", "PB9";
  938. function = "uart0";
  939. @@ -167,6 +252,17 @@
  940. };
  941. };
  942. + pwm: pwm@2000c00 {
  943. + compatible = "allwinner,sun20i-d1-pwm";
  944. + reg = <0x2000c00 0x400>;
  945. + interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
  946. + clocks = <&ccu CLK_BUS_PWM>, <&osc24M>;
  947. + clock-names = "bus", "mod";
  948. + resets = <&ccu RST_BUS_PWM>;
  949. + status = "disabled";
  950. + #pwm-cells = <3>;
  951. + };
  952. +
  953. ccu: clock-controller@2001000 {
  954. compatible = "allwinner,sun20i-d1-ccu";
  955. reg = <0x2001000 0x1000>;
  956. @@ -178,6 +274,33 @@
  957. #reset-cells = <1>;
  958. };
  959. + ledc: led-controller@2008000 {
  960. + compatible = "allwinner,sun20i-d1-ledc",
  961. + "allwinner,sun50i-a100-ledc";
  962. + reg = <0x2008000 0x400>;
  963. + interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
  964. + clocks = <&ccu CLK_BUS_LEDC>, <&ccu CLK_LEDC>;
  965. + clock-names = "bus", "mod";
  966. + resets = <&ccu RST_BUS_LEDC>;
  967. + dmas = <&dma 42>;
  968. + dma-names = "tx";
  969. + status = "disabled";
  970. + #address-cells = <1>;
  971. + #size-cells = <0>;
  972. + };
  973. +
  974. + ths: temperature-sensor@2009400 {
  975. + compatible = "allwinner,sun20i-d1-ths";
  976. + reg = <0x2009400 0x400>;
  977. + interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
  978. + clocks = <&ccu CLK_BUS_THS>, <&osc24M>;
  979. + clock-names = "bus", "mod";
  980. + resets = <&ccu RST_BUS_THS>;
  981. + nvmem-cells = <&ths_calib>;
  982. + nvmem-cell-names = "calibration";
  983. + #thermal-sensor-cells = <0>;
  984. + };
  985. +
  986. lradc: keys@2009800 {
  987. compatible = "allwinner,sun20i-d1-lradc",
  988. "allwinner,sun50i-r329-lradc";
  989. @@ -188,11 +311,30 @@
  990. status = "disabled";
  991. };
  992. + iommu: iommu@2010000 {
  993. + compatible = "allwinner,sun20i-d1-iommu";
  994. + reg = <0x2010000 0x10000>;
  995. + interrupts = <80 IRQ_TYPE_LEVEL_HIGH>;
  996. + clocks = <&ccu CLK_BUS_IOMMU>;
  997. + #iommu-cells = <1>;
  998. + };
  999. +
  1000. codec: audio-codec@2030000 {
  1001. - compatible = "simple-mfd", "syscon";
  1002. + compatible = "allwinner,sun20i-d1-codec", "simple-mfd", "syscon";
  1003. reg = <0x2030000 0x1000>;
  1004. + interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
  1005. + clocks = <&ccu CLK_BUS_AUDIO>,
  1006. + <&ccu CLK_AUDIO_ADC>,
  1007. + <&ccu CLK_AUDIO_DAC>,
  1008. + <&osc24M>,
  1009. + <&rtc CLK_OSC32K>;
  1010. + clock-names = "bus", "adc", "dac", "hosc", "losc";
  1011. + resets = <&ccu RST_BUS_AUDIO>;
  1012. + dmas = <&dma 7>, <&dma 7>;
  1013. + dma-names = "rx", "tx";
  1014. #address-cells = <1>;
  1015. #size-cells = <1>;
  1016. + #sound-dai-cells = <0>;
  1017. regulators@2030348 {
  1018. compatible = "allwinner,sun20i-d1-analog-ldos";
  1019. @@ -208,6 +350,21 @@
  1020. };
  1021. };
  1022. + dmic: dmic@2031000 {
  1023. + compatible = "allwinner,sun20i-d1-dmic",
  1024. + "allwinner,sun50i-h6-dmic";
  1025. + reg = <0x2031000 0x400>;
  1026. + interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
  1027. + clocks = <&ccu CLK_BUS_DMIC>,
  1028. + <&ccu CLK_DMIC>;
  1029. + clock-names = "bus", "mod";
  1030. + resets = <&ccu RST_BUS_DMIC>;
  1031. + dmas = <&dma 8>;
  1032. + dma-names = "rx";
  1033. + status = "disabled";
  1034. + #sound-dai-cells = <0>;
  1035. + };
  1036. +
  1037. i2s0: i2s@2032000 {
  1038. compatible = "allwinner,sun20i-d1-i2s",
  1039. "allwinner,sun50i-r329-i2s";
  1040. @@ -238,6 +395,7 @@
  1041. #sound-dai-cells = <0>;
  1042. };
  1043. + // TODO: how to integrate ASRC? same or separate node?
  1044. i2s2: i2s@2034000 {
  1045. compatible = "allwinner,sun20i-d1-i2s",
  1046. "allwinner,sun50i-r329-i2s";
  1047. @@ -253,6 +411,22 @@
  1048. #sound-dai-cells = <0>;
  1049. };
  1050. + // TODO: add receive functionality
  1051. + spdif: spdif@2036000 {
  1052. + compatible = "allwinner,sun20i-d1-spdif";
  1053. + reg = <0x2036000 0x400>;
  1054. + interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
  1055. + clocks = <&ccu CLK_BUS_SPDIF>,
  1056. + <&ccu CLK_SPDIF_RX>,
  1057. + <&ccu CLK_SPDIF_TX>;
  1058. + clock-names = "apb", "rx", "tx";
  1059. + resets = <&ccu RST_BUS_SPDIF>;
  1060. + dmas = <&dma 2>, <&dma 2>;
  1061. + dma-names = "rx", "tx";
  1062. + status = "disabled";
  1063. + #sound-dai-cells = <0>;
  1064. + };
  1065. +
  1066. timer: timer@2050000 {
  1067. compatible = "allwinner,sun20i-d1-timer",
  1068. "allwinner,sun8i-a23-timer";
  1069. @@ -457,6 +631,18 @@
  1070. };
  1071. };
  1072. + crypto: crypto@3040000 {
  1073. + compatible = "allwinner,sun20i-d1-crypto";
  1074. + reg = <0x3040000 0x800>;
  1075. + interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
  1076. + clocks = <&ccu CLK_BUS_CE>,
  1077. + <&ccu CLK_CE>,
  1078. + <&ccu CLK_MBUS_CE>,
  1079. + <&rtc CLK_IOSC>;
  1080. + clock-names = "bus", "mod", "ram", "trng";
  1081. + resets = <&ccu RST_BUS_CE>;
  1082. + };
  1083. +
  1084. mbus: dram-controller@3102000 {
  1085. compatible = "allwinner,sun20i-d1-mbus";
  1086. reg = <0x3102000 0x1000>,
  1087. @@ -525,6 +711,39 @@
  1088. #size-cells = <0>;
  1089. };
  1090. + spi0: spi@4025000 {
  1091. + compatible = "allwinner,sun20i-d1-spi",
  1092. + "allwinner,sun50i-r329-spi";
  1093. + reg = <0x4025000 0x1000>;
  1094. + interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
  1095. + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
  1096. + clock-names = "ahb", "mod";
  1097. + resets = <&ccu RST_BUS_SPI0>;
  1098. + dmas = <&dma 22>, <&dma 22>;
  1099. + dma-names = "rx", "tx";
  1100. + num-cs = <1>;
  1101. + status = "disabled";
  1102. + #address-cells = <1>;
  1103. + #size-cells = <0>;
  1104. + };
  1105. +
  1106. + spi1: spi@4026000 {
  1107. + compatible = "allwinner,sun20i-d1-spi-dbi",
  1108. + "allwinner,sun50i-r329-spi-dbi",
  1109. + "allwinner,sun50i-r329-spi";
  1110. + reg = <0x4026000 0x1000>;
  1111. + interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
  1112. + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
  1113. + clock-names = "ahb", "mod";
  1114. + resets = <&ccu RST_BUS_SPI1>;
  1115. + dmas = <&dma 23>, <&dma 23>;
  1116. + dma-names = "rx", "tx";
  1117. + num-cs = <1>;
  1118. + status = "disabled";
  1119. + #address-cells = <1>;
  1120. + #size-cells = <0>;
  1121. + };
  1122. +
  1123. usb_otg: usb@4100000 {
  1124. compatible = "allwinner,sun20i-d1-musb",
  1125. "allwinner,sun8i-a33-musb";
  1126. @@ -653,6 +872,7 @@
  1127. <&display_clocks CLK_MIXER0>;
  1128. clock-names = "bus", "mod";
  1129. resets = <&display_clocks RST_MIXER0>;
  1130. + iommus = <&iommu 2>;
  1131. ports {
  1132. #address-cells = <1>;
  1133. @@ -675,6 +895,7 @@
  1134. <&display_clocks CLK_MIXER1>;
  1135. clock-names = "bus", "mod";
  1136. resets = <&display_clocks RST_MIXER1>;
  1137. + iommus = <&iommu 2>;
  1138. ports {
  1139. #address-cells = <1>;
  1140. @@ -690,6 +911,40 @@
  1141. };
  1142. };
  1143. + dsi: dsi@5450000 {
  1144. + compatible = "allwinner,sun20i-d1-mipi-dsi",
  1145. + "allwinner,sun50i-a100-mipi-dsi";
  1146. + reg = <0x5450000 0x1000>;
  1147. + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
  1148. + clocks = <&ccu CLK_BUS_MIPI_DSI>,
  1149. + <&tcon_top CLK_TCON_TOP_DSI>;
  1150. + clock-names = "bus", "mod";
  1151. + resets = <&ccu RST_BUS_MIPI_DSI>;
  1152. + phys = <&dphy>;
  1153. + phy-names = "dphy";
  1154. + status = "disabled";
  1155. + #address-cells = <1>;
  1156. + #size-cells = <0>;
  1157. +
  1158. + port {
  1159. + dsi_in_tcon_lcd0: endpoint {
  1160. + remote-endpoint = <&tcon_lcd0_out_dsi>;
  1161. + };
  1162. + };
  1163. + };
  1164. +
  1165. + dphy: phy@5451000 {
  1166. + compatible = "allwinner,sun20i-d1-mipi-dphy",
  1167. + "allwinner,sun50i-a100-mipi-dphy";
  1168. + reg = <0x5451000 0x1000>;
  1169. + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
  1170. + clocks = <&ccu CLK_BUS_MIPI_DSI>,
  1171. + <&ccu CLK_MIPI_DSI>;
  1172. + clock-names = "bus", "mod";
  1173. + resets = <&ccu RST_BUS_MIPI_DSI>;
  1174. + #phy-cells = <0>;
  1175. + };
  1176. +
  1177. tcon_top: tcon-top@5460000 {
  1178. compatible = "allwinner,sun20i-d1-tcon-top";
  1179. reg = <0x5460000 0x1000>;
  1180. @@ -770,6 +1025,10 @@
  1181. tcon_top_hdmi_out: port@5 {
  1182. reg = <5>;
  1183. +
  1184. + tcon_top_hdmi_out_hdmi: endpoint {
  1185. + remote-endpoint = <&hdmi_in_tcon_top>;
  1186. + };
  1187. };
  1188. };
  1189. };
  1190. @@ -785,6 +1044,8 @@
  1191. resets = <&ccu RST_BUS_TCON_LCD0>,
  1192. <&ccu RST_BUS_LVDS0>;
  1193. reset-names = "lcd", "lvds";
  1194. + phys = <&dphy>;
  1195. + phy-names = "lvds0";
  1196. #clock-cells = <0>;
  1197. ports {
  1198. @@ -809,6 +1070,13 @@
  1199. tcon_lcd0_out: port@1 {
  1200. reg = <1>;
  1201. + #address-cells = <1>;
  1202. + #size-cells = <0>;
  1203. +
  1204. + tcon_lcd0_out_dsi: endpoint@1 {
  1205. + reg = <1>;
  1206. + remote-endpoint = <&dsi_in_tcon_lcd0>;
  1207. + };
  1208. };
  1209. };
  1210. };
  1211. @@ -853,6 +1121,50 @@
  1212. };
  1213. };
  1214. + hdmi: hdmi@5500000 {
  1215. + compatible = "allwinner,sun20i-d1-dw-hdmi";
  1216. + reg = <0x5500000 0x10000>;
  1217. + reg-io-width = <1>;
  1218. + interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
  1219. + clocks = <&ccu CLK_BUS_HDMI>,
  1220. + <&ccu CLK_HDMI_24M>,
  1221. + <&ccu CLK_HDMI_CEC>;
  1222. + clock-names = "iahb", "isfr", "cec";
  1223. + resets = <&ccu RST_BUS_HDMI_SUB>;
  1224. + reset-names = "ctrl";
  1225. + phys = <&hdmi_phy>;
  1226. + phy-names = "phy";
  1227. + status = "disabled";
  1228. +
  1229. + ports {
  1230. + #address-cells = <1>;
  1231. + #size-cells = <0>;
  1232. +
  1233. + port@0 {
  1234. + reg = <0>;
  1235. +
  1236. + hdmi_in_tcon_top: endpoint {
  1237. + remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
  1238. + };
  1239. + };
  1240. +
  1241. + hdmi_out: port@1 {
  1242. + reg = <1>;
  1243. + };
  1244. + };
  1245. + };
  1246. +
  1247. + hdmi_phy: phy@5510000 {
  1248. + compatible = "allwinner,sun20i-d1-hdmi-phy";
  1249. + reg = <0x5510000 0x10000>;
  1250. + clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_24M>;
  1251. + clock-names = "bus", "mod";
  1252. + resets = <&ccu RST_BUS_HDMI_MAIN>;
  1253. + reset-names = "phy";
  1254. + status = "disabled";
  1255. + #phy-cells = <0>;
  1256. + };
  1257. +
  1258. riscv_wdt: watchdog@6011000 {
  1259. compatible = "allwinner,sun20i-d1-wdt";
  1260. reg = <0x6011000 0x20>;