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- From 7388400b8bd42f71d040dbf2fdbdcb834fcc0ede Mon Sep 17 00:00:00 2001
- From: Gokul Sriram Palanisamy <[email protected]>
- Date: Sat, 30 Jan 2021 10:50:13 +0530
- Subject: [PATCH] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
- Enable remoteproc WCSS PIL driver with glink and ssr subdevices.
- Also enables smp2p and mailboxes required for IPC.
- Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
- Signed-off-by: Sricharan R <[email protected]>
- Signed-off-by: Nikhil Prakash V <[email protected]>
- Signed-off-by: Robert Marko <[email protected]>
- ---
- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 81 +++++++++++++++++++++++++++
- 1 file changed, 81 insertions(+)
- --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- @@ -142,6 +142,32 @@
- };
- };
-
- + wcss: smp2p-wcss {
- + compatible = "qcom,smp2p";
- + qcom,smem = <435>, <428>;
- +
- + interrupt-parent = <&intc>;
- + interrupts = <0 322 1>;
- +
- + mboxes = <&apcs_glb 9>;
- +
- + qcom,local-pid = <0>;
- + qcom,remote-pid = <1>;
- +
- + wcss_smp2p_out: master-kernel {
- + qcom,entry-name = "master-kernel";
- + qcom,smp2p-feature-ssr-ack;
- + #qcom,smem-state-cells = <1>;
- + };
- +
- + wcss_smp2p_in: slave-kernel {
- + qcom,entry-name = "slave-kernel";
- +
- + interrupt-controller;
- + #interrupt-cells = <2>;
- + };
- + };
- +
- soc: soc@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- @@ -425,6 +451,11 @@
- reg = <0x01937000 0x21000>;
- };
-
- + tcsr_q6: syscon@1945000 {
- + compatible = "syscon";
- + reg = <0x01945000 0xe000>;
- + };
- +
- spmi_bus: spmi@200f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x0200f000 0x001000>,
- @@ -970,6 +1001,56 @@
- "axi_s_sticky";
- status = "disabled";
- };
- +
- + q6v5_wcss: q6v5_wcss@cd00000 {
- + compatible = "qcom,ipq8074-wcss-pil";
- + reg = <0x0cd00000 0x4040>,
- + <0x004ab000 0x20>;
- + reg-names = "qdsp6",
- + "rmb";
- + qca,auto-restart;
- + qca,extended-intc;
- + interrupts-extended = <&intc 0 325 1>,
- + <&wcss_smp2p_in 0 0>,
- + <&wcss_smp2p_in 1 0>,
- + <&wcss_smp2p_in 2 0>,
- + <&wcss_smp2p_in 3 0>;
- + interrupt-names = "wdog",
- + "fatal",
- + "ready",
- + "handover",
- + "stop-ack";
- +
- + resets = <&gcc GCC_WCSSAON_RESET>,
- + <&gcc GCC_WCSS_BCR>,
- + <&gcc GCC_WCSS_Q6_BCR>;
- +
- + reset-names = "wcss_aon_reset",
- + "wcss_reset",
- + "wcss_q6_reset";
- +
- + clocks = <&gcc GCC_PRNG_AHB_CLK>;
- + clock-names = "prng";
- +
- + qcom,halt-regs = <&tcsr_q6 0xa000 0xd000 0x0>;
- +
- + qcom,smem-states = <&wcss_smp2p_out 0>,
- + <&wcss_smp2p_out 1>;
- + qcom,smem-state-names = "shutdown",
- + "stop";
- +
- + memory-region = <&q6_region>;
- +
- + glink-edge {
- + interrupts = <GIC_SPI 321 IRQ_TYPE_EDGE_RISING>;
- + qcom,remote-pid = <1>;
- + mboxes = <&apcs_glb 8>;
- +
- + rpm_requests {
- + qcom,glink-channels = "IPCRTR";
- + };
- + };
- + };
- };
-
- timer {
|
