qcom-ipq8062-wg2600hp3.dts 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq8062-smb208.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. #include <dt-bindings/leds/common.h>
  5. / {
  6. model = "NEC Platforms Aterm WG2600HP3";
  7. compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
  8. memory {
  9. device_type = "memory";
  10. reg = <0x42000000 0x1e000000>;
  11. };
  12. aliases {
  13. label-mac-device = &gmac2;
  14. led-boot = &led_power_green;
  15. led-failsafe = &led_power_red;
  16. led-running = &led_power_green;
  17. led-upgrade = &led_power_red;
  18. };
  19. keys {
  20. compatible = "gpio-keys";
  21. pinctrl-0 = <&buttons_pins>;
  22. pinctrl-names = "default";
  23. reset {
  24. label = "reset";
  25. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  26. linux,code = <KEY_RESTART>;
  27. debounce-interval = <60>;
  28. wakeup-source;
  29. };
  30. wps {
  31. label = "wps";
  32. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
  33. linux,code = <KEY_WPS_BUTTON>;
  34. debounce-interval = <60>;
  35. wakeup-source;
  36. };
  37. mode0 {
  38. label = "mode0";
  39. gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
  40. linux,code = <BTN_0>;
  41. linux,input-type = <EV_SW>;
  42. debounce-interval = <60>;
  43. wakeup-source;
  44. };
  45. mode1 {
  46. label = "mode1";
  47. gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
  48. linux,code = <BTN_1>;
  49. linux,input-type = <EV_SW>;
  50. debounce-interval = <60>;
  51. wakeup-source;
  52. };
  53. };
  54. leds {
  55. compatible = "gpio-leds";
  56. pinctrl-0 = <&leds_pins>;
  57. pinctrl-names = "default";
  58. led_power_green: power_green {
  59. function = LED_FUNCTION_POWER;
  60. color = <LED_COLOR_ID_GREEN>;
  61. gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  62. };
  63. led_power_red: power_red {
  64. function = LED_FUNCTION_POWER;
  65. color = <LED_COLOR_ID_RED>;
  66. gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
  67. };
  68. active_green {
  69. label = "green:active";
  70. gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
  71. };
  72. active_red {
  73. label = "red:active";
  74. gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
  75. };
  76. wlan2g_green {
  77. label = "green:wlan2g";
  78. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
  79. linux,default-trigger = "phy1tpt";
  80. };
  81. wlan2g_red {
  82. label = "red:wlan2g";
  83. gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
  84. };
  85. wlan5g_green {
  86. label = "green:wlan5g";
  87. gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
  88. linux,default-trigger = "phy0tpt";
  89. };
  90. wlan5g_red {
  91. label = "red:wlan5g";
  92. gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
  93. };
  94. tv_green {
  95. label = "green:tv";
  96. gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
  97. };
  98. tv_red {
  99. label = "red:tv";
  100. gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
  101. };
  102. converter_green {
  103. label = "green:converter";
  104. gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
  105. };
  106. converter_red {
  107. label = "red:converter";
  108. gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  109. };
  110. };
  111. };
  112. /* nand_pins are used for leds_pins, empty the node
  113. * from ipq8064.dtsi
  114. */
  115. &nand_pins {
  116. /delete-property/ disable;
  117. /delete-property/ pullups;
  118. /delete-property/ hold;
  119. };
  120. &qcom_pinmux {
  121. pinctrl-0 = <&akro_pins>;
  122. pinctrl-names = "default";
  123. spi_pins: spi_pins {
  124. mux {
  125. pins = "gpio18", "gpio19", "gpio21";
  126. function = "gsbi5";
  127. bias-pull-down;
  128. };
  129. data {
  130. pins = "gpio18", "gpio19";
  131. drive-strength = <10>;
  132. };
  133. cs {
  134. pins = "gpio20";
  135. drive-strength = <10>;
  136. };
  137. clk {
  138. pins = "gpio21";
  139. drive-strength = <12>;
  140. };
  141. };
  142. buttons_pins: buttons_pins {
  143. mux {
  144. pins = "gpio22", "gpio24", "gpio40",
  145. "gpio41";
  146. function = "gpio";
  147. drive-strength = <2>;
  148. bias-pull-up;
  149. };
  150. };
  151. leds_pins: leds_pins {
  152. mux {
  153. pins = "gpio14", "gpio15", "gpio35",
  154. "gpio36", "gpio38", "gpio42",
  155. "gpio43", "gpio46", "gpio55",
  156. "gpio56", "gpio57", "gpio58";
  157. function = "gpio";
  158. bias-pull-down;
  159. };
  160. akro2 {
  161. pins = "gpio15", "gpio35", "gpio38",
  162. "gpio42", "gpio43", "gpio46",
  163. "gpio55", "gpio56", "gpio57",
  164. "gpio58";
  165. drive-strength = <2>;
  166. };
  167. akro4 {
  168. pins = "gpio14", "gpio36";
  169. drive-strength = <4>;
  170. };
  171. };
  172. /*
  173. * Stock firmware has the following settings, so let's do the same.
  174. * I don't sure why these are required.
  175. */
  176. akro_pins: akro_pinmux {
  177. akro {
  178. pins = "gpio17", "gpio26", "gpio47";
  179. function = "gpio";
  180. drive-strength = <2>;
  181. bias-pull-down;
  182. };
  183. reset {
  184. pins = "gpio45";
  185. function = "gpio";
  186. drive-strength = <2>;
  187. bias-disable;
  188. output-low;
  189. };
  190. gmac0_rgmii {
  191. pins = "gpio25";
  192. function = "gpio";
  193. drive-strength = <8>;
  194. bias-disable;
  195. };
  196. };
  197. };
  198. &gsbi5 {
  199. status = "okay";
  200. qcom,mode = <GSBI_PROT_SPI>;
  201. spi@1a280000 {
  202. status = "okay";
  203. pinctrl-0 = <&spi_pins>;
  204. pinctrl-names = "default";
  205. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  206. flash@0 {
  207. compatible = "jedec,spi-nor";
  208. reg = <0>;
  209. spi-max-frequency = <50000000>;
  210. m25p,fast-read;
  211. partitions {
  212. compatible = "fixed-partitions";
  213. #address-cells = <1>;
  214. #size-cells = <1>;
  215. partition@0 {
  216. label = "SBL1";
  217. reg = <0x0000000 0x0020000>;
  218. read-only;
  219. };
  220. partition@20000 {
  221. label = "MIBIB";
  222. reg = <0x0020000 0x0020000>;
  223. read-only;
  224. };
  225. partition@40000 {
  226. label = "SBL2";
  227. reg = <0x0040000 0x0040000>;
  228. read-only;
  229. };
  230. partition@80000 {
  231. label = "SBL3";
  232. reg = <0x0080000 0x0080000>;
  233. read-only;
  234. };
  235. partition@100000 {
  236. label = "DDRCONFIG";
  237. reg = <0x0100000 0x0010000>;
  238. read-only;
  239. };
  240. partition@110000 {
  241. label = "SSD";
  242. reg = <0x0110000 0x0010000>;
  243. read-only;
  244. };
  245. partition@120000 {
  246. label = "TZ";
  247. reg = <0x0120000 0x0080000>;
  248. read-only;
  249. };
  250. partition@1a0000 {
  251. label = "RPM";
  252. reg = <0x01a0000 0x0080000>;
  253. read-only;
  254. };
  255. partition@220000 {
  256. label = "APPSBL";
  257. reg = <0x0220000 0x0080000>;
  258. read-only;
  259. };
  260. partition@2a0000 {
  261. label = "APPSBLENV";
  262. reg = <0x02a0000 0x0010000>;
  263. read-only;
  264. };
  265. factory: partition@2b0000 {
  266. label = "PRODUCTDATA";
  267. reg = <0x02b0000 0x0030000>;
  268. read-only;
  269. nvmem-layout {
  270. compatible = "fixed-layout";
  271. #address-cells = <1>;
  272. #size-cells = <1>;
  273. macaddr_factory_0: macaddr@0 {
  274. reg = <0x0 0x6>;
  275. };
  276. macaddr_factory_6: macaddr@6 {
  277. reg = <0x6 0x6>;
  278. };
  279. macaddr_PRODUCTDATA_c: macaddr@c {
  280. reg = <0xc 0x6>;
  281. };
  282. macaddr_PRODUCTDATA_12: macaddr@12 {
  283. reg = <0x12 0x6>;
  284. };
  285. };
  286. };
  287. partition@2e0000 {
  288. label = "ART";
  289. reg = <0x02e0000 0x0040000>;
  290. read-only;
  291. nvmem-layout {
  292. compatible = "fixed-layout";
  293. #address-cells = <1>;
  294. #size-cells = <1>;
  295. precal_ART_1000: precal@1000 {
  296. reg = <0x1000 0x2f20>;
  297. };
  298. precal_ART_5000: precal@5000 {
  299. reg = <0x5000 0x2f20>;
  300. };
  301. };
  302. };
  303. partition@320000 {
  304. label = "TP";
  305. reg = <0x0320000 0x0040000>;
  306. read-only;
  307. };
  308. partition@360000 {
  309. label = "TINY";
  310. reg = <0x0360000 0x0500000>;
  311. read-only;
  312. };
  313. partition@860000 {
  314. compatible = "denx,uimage";
  315. label = "firmware";
  316. reg = <0x0860000 0x17a0000>;
  317. };
  318. };
  319. };
  320. };
  321. };
  322. &adm_dma {
  323. status = "okay";
  324. };
  325. &pcie0 {
  326. status = "okay";
  327. bridge@0,0 {
  328. reg = <0x00000000 0 0 0 0>;
  329. #address-cells = <3>;
  330. #size-cells = <2>;
  331. ranges;
  332. wifi@1,0 {
  333. compatible = "qcom,ath10k";
  334. reg = <0x00010000 0 0 0 0>;
  335. qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
  336. nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
  337. nvmem-cell-names = "mac-address", "pre-calibration";
  338. };
  339. };
  340. };
  341. &pcie1 {
  342. status = "okay";
  343. force_gen1 = <1>;
  344. bridge@0,0 {
  345. reg = <0x00000000 0 0 0 0>;
  346. #address-cells = <3>;
  347. #size-cells = <2>;
  348. ranges;
  349. wifi@1,0 {
  350. compatible = "qcom,ath10k";
  351. reg = <0x00010000 0 0 0 0>;
  352. ieee80211-freq-limit = <2400000 2483000>;
  353. qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
  354. nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
  355. nvmem-cell-names = "mac-address", "pre-calibration";
  356. };
  357. };
  358. };
  359. &mdio0 {
  360. status = "okay";
  361. pinctrl-0 = <&mdio0_pins>;
  362. pinctrl-names = "default";
  363. switch@10 {
  364. compatible = "qca,qca8337";
  365. #address-cells = <1>;
  366. #size-cells = <0>;
  367. reg = <0x10>;
  368. ports {
  369. #address-cells = <1>;
  370. #size-cells = <0>;
  371. port@0 {
  372. reg = <0>;
  373. label = "cpu";
  374. ethernet = <&gmac1>;
  375. phy-mode = "rgmii";
  376. tx-internal-delay-ps = <1000>;
  377. fixed-link {
  378. speed = <1000>;
  379. full-duplex;
  380. };
  381. };
  382. port@1 {
  383. reg = <1>;
  384. label = "wan";
  385. phy-mode = "internal";
  386. phy-handle = <&phy_port1>;
  387. leds {
  388. #address-cells = <1>;
  389. #size-cells = <0>;
  390. led@0 {
  391. reg = <0>;
  392. color = <LED_COLOR_ID_GREEN>;
  393. function = LED_FUNCTION_WAN;
  394. function-enumerator = <1>;
  395. default-state = "keep";
  396. };
  397. led@1 {
  398. reg = <1>;
  399. color = <LED_COLOR_ID_GREEN>;
  400. function = LED_FUNCTION_WAN;
  401. function-enumerator = <2>;
  402. default-state = "keep";
  403. };
  404. led@2 {
  405. reg = <2>;
  406. color = <LED_COLOR_ID_GREEN>;
  407. function = LED_FUNCTION_WAN;
  408. function-enumerator = <3>;
  409. default-state = "keep";
  410. };
  411. };
  412. };
  413. port@2 {
  414. reg = <2>;
  415. label = "lan1";
  416. phy-mode = "internal";
  417. phy-handle = <&phy_port2>;
  418. leds {
  419. #address-cells = <1>;
  420. #size-cells = <0>;
  421. led@0 {
  422. reg = <0>;
  423. color = <LED_COLOR_ID_GREEN>;
  424. function = LED_FUNCTION_LAN;
  425. function-enumerator = <1>;
  426. default-state = "keep";
  427. };
  428. led@1 {
  429. reg = <1>;
  430. color = <LED_COLOR_ID_GREEN>;
  431. function = LED_FUNCTION_LAN;
  432. function-enumerator = <2>;
  433. default-state = "keep";
  434. };
  435. led@2 {
  436. reg = <2>;
  437. color = <LED_COLOR_ID_GREEN>;
  438. function = LED_FUNCTION_LAN;
  439. function-enumerator = <3>;
  440. default-state = "keep";
  441. };
  442. };
  443. };
  444. port@3 {
  445. reg = <3>;
  446. label = "lan2";
  447. phy-mode = "internal";
  448. phy-handle = <&phy_port3>;
  449. leds {
  450. #address-cells = <1>;
  451. #size-cells = <0>;
  452. led@0 {
  453. reg = <0>;
  454. color = <LED_COLOR_ID_GREEN>;
  455. function = LED_FUNCTION_LAN;
  456. function-enumerator = <1>;
  457. default-state = "keep";
  458. };
  459. led@1 {
  460. reg = <1>;
  461. color = <LED_COLOR_ID_GREEN>;
  462. function = LED_FUNCTION_LAN;
  463. function-enumerator = <2>;
  464. default-state = "keep";
  465. };
  466. led@2 {
  467. reg = <2>;
  468. color = <LED_COLOR_ID_GREEN>;
  469. function = LED_FUNCTION_LAN;
  470. function-enumerator = <3>;
  471. default-state = "keep";
  472. };
  473. };
  474. };
  475. port@4 {
  476. reg = <4>;
  477. label = "lan3";
  478. phy-mode = "internal";
  479. phy-handle = <&phy_port4>;
  480. leds {
  481. #address-cells = <1>;
  482. #size-cells = <0>;
  483. led@0 {
  484. reg = <0>;
  485. color = <LED_COLOR_ID_GREEN>;
  486. function = LED_FUNCTION_LAN;
  487. function-enumerator = <1>;
  488. default-state = "keep";
  489. };
  490. led@1 {
  491. reg = <1>;
  492. color = <LED_COLOR_ID_GREEN>;
  493. function = LED_FUNCTION_LAN;
  494. function-enumerator = <2>;
  495. default-state = "keep";
  496. };
  497. led@2 {
  498. reg = <2>;
  499. color = <LED_COLOR_ID_GREEN>;
  500. function = LED_FUNCTION_LAN;
  501. function-enumerator = <3>;
  502. default-state = "keep";
  503. };
  504. };
  505. };
  506. port@5 {
  507. reg = <5>;
  508. label = "lan4";
  509. phy-mode = "internal";
  510. phy-handle = <&phy_port5>;
  511. leds {
  512. #address-cells = <1>;
  513. #size-cells = <0>;
  514. led@0 {
  515. reg = <0>;
  516. color = <LED_COLOR_ID_GREEN>;
  517. function = LED_FUNCTION_LAN;
  518. function-enumerator = <1>;
  519. default-state = "keep";
  520. };
  521. led@1 {
  522. reg = <1>;
  523. color = <LED_COLOR_ID_GREEN>;
  524. function = LED_FUNCTION_LAN;
  525. function-enumerator = <2>;
  526. default-state = "keep";
  527. };
  528. led@2 {
  529. reg = <2>;
  530. color = <LED_COLOR_ID_GREEN>;
  531. function = LED_FUNCTION_LAN;
  532. function-enumerator = <3>;
  533. default-state = "keep";
  534. };
  535. };
  536. };
  537. port@6 {
  538. reg = <6>;
  539. label = "cpu";
  540. ethernet = <&gmac2>;
  541. phy-mode = "sgmii";
  542. qca,sgmii-enable-pll;
  543. qca,sgmii-rxclk-falling-edge;
  544. fixed-link {
  545. speed = <1000>;
  546. full-duplex;
  547. };
  548. };
  549. };
  550. mdio {
  551. #address-cells = <1>;
  552. #size-cells = <0>;
  553. phy_port1: phy@0 {
  554. reg = <0>;
  555. };
  556. phy_port2: phy@1 {
  557. reg = <1>;
  558. };
  559. phy_port3: phy@2 {
  560. reg = <2>;
  561. };
  562. phy_port4: phy@3 {
  563. reg = <3>;
  564. };
  565. phy_port5: phy@4 {
  566. reg = <4>;
  567. };
  568. };
  569. };
  570. };
  571. &gmac1 {
  572. status = "okay";
  573. pinctrl-0 = <&rgmii2_pins>;
  574. pinctrl-names = "default";
  575. phy-mode = "rgmii";
  576. qcom,id = <1>;
  577. mdiobus = <&mdio0>;
  578. nvmem-cells = <&macaddr_factory_0>;
  579. nvmem-cell-names = "mac-address";
  580. fixed-link {
  581. speed = <1000>;
  582. full-duplex;
  583. };
  584. };
  585. &gmac2 {
  586. status = "okay";
  587. phy-mode = "sgmii";
  588. qcom,id = <2>;
  589. mdiobus = <&mdio0>;
  590. nvmem-cells = <&macaddr_factory_6>;
  591. nvmem-cell-names = "mac-address";
  592. fixed-link {
  593. speed = <1000>;
  594. full-duplex;
  595. };
  596. };
  597. &hs_phy_0 {
  598. status = "okay";
  599. };
  600. &ss_phy_0 {
  601. status = "okay";
  602. };
  603. &usb3_0 {
  604. status = "okay";
  605. };
  606. &hs_phy_1 {
  607. status = "okay";
  608. };
  609. &ss_phy_1 {
  610. status = "okay";
  611. };
  612. &usb3_1 {
  613. status = "okay";
  614. };