openwrt/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq8064-v2.0-smb208.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Ubiquiti UniFi AC HD";
	compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";

	aliases {
		label-mac-device = &gmac2;
		led-boot = &led_dome_white;
		led-failsafe = &led_dome_white;
		led-running = &led_dome_blue;
		led-upgrade = &led_dome_blue;
		mdio-gpio0 = &mdio0;
		ethernet0 = &gmac2;
		ethernet1 = &gmac1;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&led_pins>;
		pinctrl-names = "default";

		led_dome_blue: dome_blue {
			label = "blue:dome";
			gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
		};

		led_dome_white: dome_white {
			label = "white:dome";
			gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
		};
	};

	keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&button_pins>;
		pinctrl-names = "default";

		reset {
			label = "reset";
			gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
			debounce-interval = <60>;
			wakeup-source;
		};
	};
};

&qcom_pinmux {
	button_pins: button_pins {
		mux {
			pins = "gpio68";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-up;
		};
	};

	led_pins: led_pins {
		mux {
			pins = "gpio9", "gpio53";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-down;
			output-low;
		};
	};

	spi_pins: spi_pins {
		mux {
			pins = "gpio18", "gpio19", "gpio21";
			function = "gsbi5";
			drive-strength = <10>;
			bias-none;
		};

		cs {
			pins = "gpio20";
			drive-strength = <12>;
		};
	};
};

&CPU_SPC {
	status = "disabled";
};

&gsbi5 {
	status = "okay";

	qcom,mode = <GSBI_PROT_SPI>;

	spi@1a280000 {
		status = "okay";

		pinctrl-0 = <&spi_pins>;
		pinctrl-names = "default";
		cs-gpios = <&qcom_pinmux 20 0>;

		flash@0 {
			compatible = "mx25u25635f", "jedec,spi-nor";
			#address-cells = <1>;
			#size-cells = <1>;
			spi-max-frequency = <50000000>;
			reg = <0>;
			m25p,fast-read;

			partitions {
				compatible = "fixed-partitions";
				#address-cells = <1>;
				#size-cells = <1>;

				partition@0 {
					label = "SBL1";
					reg = <0x0 0x20000>;
					read-only;
				};

				partition@20000 {
					label = "MIBIB";
					reg = <0x20000 0x10000>;
					read-only;
				};

				partition@30000 {
					label = "SBL2";
					reg = <0x30000 0x20000>;
					read-only;
				};

				partition@50000 {
					label = "SBL3";
					reg = <0x50000 0x30000>;
					read-only;
				};

				partition@80000 {
					label = "DDRCONFIG";
					reg = <0x80000 0x10000>;
					read-only;
				};

				partition@90000 {
					label = "SSD";
					reg = <0x90000 0x10000>;
					read-only;
				};

				partition@a0000 {
					label = "TZ";
					reg = <0xa0000 0x30000>;
					read-only;
				};

				partition@d0000 {
					label = "RPM";
					reg = <0xd0000 0x20000>;
					read-only;
				};

				partition@f0000 {
					label = "APPSBL";
					reg = <0xf0000 0xc0000>;
					read-only;
				};

				partition@1b0000 {
					label = "APPSBLENV";
					reg = <0x1b0000 0x10000>;
					read-only;
				};

				eeprom: partition@1c0000 {
					label = "EEPROM";
					reg = <0x1c0000 0x10000>;
					read-only;

					nvmem-layout {
						compatible = "fixed-layout";
						#address-cells = <1>;
						#size-cells = <1>;

						macaddr_eeprom_0: macaddr@0 {
							reg = <0x0 0x6>;
						};

						macaddr_eeprom_6: macaddr@6 {
							reg = <0x6 0x6>;
						};
					};
				};

				partition@1d0000 {
					label = "bootselect";
					reg = <0x1d0000 0x10000>;
				};

				partition@1e0000 {
					compatible = "denx,fit";
					label = "firmware";
					reg = <0x1e0000 0xe70000>;
				};

				partition@1050000 {
					label = "kernel1";
					reg = <0x1050000 0xe70000>;
					read-only;
				};

				partition@1ec0000 {
					label = "debug";
					reg = <0x1ec0000 0x100000>;
					read-only;
				};

				partition@1fc0000 {
					label = "cfg";
					reg = <0x1fc0000 0x40000>;
					read-only;
				};
			};
		};
	};
};

&adm_dma {
	status = "okay";
};

&nand {
	status = "okay";

	nand-ecc-strength = <4>;
	nand-bus-width = <8>;
};

&mdio0 {
	status = "okay";

	pinctrl-0 = <&mdio0_pins>;
	pinctrl-names = "default";

	phy4: ethernet-phy@4 {
		reg = <4>;
	};

	phy5: ethernet-phy@5 {
		reg = <5>;
	};
};

&gmac1 {
	status = "okay";

	mdiobus = <&mdio0>;
	phy-handle = <&phy5>;
	phy-mode = "sgmii";
	qcom,id = <1>;

	nvmem-cells = <&macaddr_eeprom_6>;
	nvmem-cell-names = "mac-address";
};

&gmac2 {
	status = "okay";

	mdiobus = <&mdio0>;
	phy-handle = <&phy4>;
	phy-mode = "sgmii";
	qcom,id = <2>;

	nvmem-cells = <&macaddr_eeprom_0>;
	nvmem-cell-names = "mac-address";
};

&pcie0 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

&tcsr {
	status = "okay";
};

&hs_phy_0 {
	status = "okay";
};

&ss_phy_0 {
	status = "okay";
};

&usb3_0 {
	status = "okay";
};

&hs_phy_1 {
	status = "okay";
};

&ss_phy_1 {
	status = "okay";
};

&usb3_1 {
	status = "okay";
};