qcom-ipq8064-wpq864.dts 8.4 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * Copyright (C) 2017 Christian Mehlis <[email protected]>
  4. * Copyright (C) 2018 Mathias Kresin <[email protected]>
  5. * All rights reserved.
  6. */
  7. #include "qcom-ipq8064-v1.0.dtsi"
  8. #include <dt-bindings/input/input.h>
  9. #include <dt-bindings/leds/common.h>
  10. #include <dt-bindings/soc/qcom,tcsr.h>
  11. / {
  12. compatible = "compex,wpq864", "qcom,ipq8064";
  13. model = "Compex WPQ864";
  14. aliases {
  15. mdio-gpio0 = &mdio0;
  16. ethernet0 = &gmac1;
  17. ethernet1 = &gmac0;
  18. led-boot = &led_pass;
  19. led-failsafe = &led_fail;
  20. led-running = &led_pass;
  21. led-upgrade = &led_pass;
  22. };
  23. leds {
  24. compatible = "gpio-leds";
  25. pinctrl-0 = <&led_pins>;
  26. pinctrl-names = "default";
  27. rss4 {
  28. label = "green:rss4";
  29. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  30. };
  31. rss3 {
  32. label = "green:rss3";
  33. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  34. default-state = "keep";
  35. };
  36. rss2 {
  37. label = "orange:rss2";
  38. gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
  39. };
  40. rss1 {
  41. label = "red:rss1";
  42. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  43. };
  44. led_pass: pass {
  45. label = "green:pass";
  46. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  47. };
  48. led_fail: fail {
  49. label = "green:fail";
  50. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  51. };
  52. usb {
  53. function = LED_FUNCTION_USB;
  54. color = <LED_COLOR_ID_GREEN>;
  55. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  56. };
  57. usb-pcie {
  58. label = "green:usb-pcie";
  59. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  60. };
  61. };
  62. keys {
  63. compatible = "gpio-keys";
  64. pinctrl-0 = <&button_pins>;
  65. pinctrl-names = "default";
  66. reset {
  67. label = "reset";
  68. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  69. linux,code = <KEY_RESTART>;
  70. debounce-interval = <60>;
  71. wakeup-source;
  72. };
  73. };
  74. beeper {
  75. compatible = "gpio-beeper";
  76. pinctrl-0 = <&beeper_pins>;
  77. pinctrl-names = "default";
  78. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
  79. };
  80. };
  81. &rpm {
  82. pinctrl-0 = <&rpm_pins>;
  83. pinctrl-names = "default";
  84. };
  85. &nand {
  86. status = "okay";
  87. pinctrl-0 = <&nand_pins>;
  88. pinctrl-names = "default";
  89. mt29f2g08abbeah4@0 {
  90. compatible = "qcom,nandcs";
  91. reg = <0>;
  92. nand-ecc-strength = <4>;
  93. nand-bus-width = <8>;
  94. nand-ecc-step-size = <512>;
  95. nand-is-boot-medium;
  96. qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
  97. partitions {
  98. compatible = "fixed-partitions";
  99. #address-cells = <1>;
  100. #size-cells = <1>;
  101. partition@0 {
  102. label = "0:SBL1";
  103. reg = <0x0000000 0x0040000>;
  104. read-only;
  105. };
  106. partition@40000 {
  107. label = "0:MIBIB";
  108. reg = <0x0040000 0x0140000>;
  109. read-only;
  110. };
  111. partition@180000 {
  112. label = "0:SBL2";
  113. reg = <0x0180000 0x0140000>;
  114. read-only;
  115. };
  116. partition@2c0000 {
  117. label = "0:SBL3";
  118. reg = <0x02c0000 0x0280000>;
  119. read-only;
  120. };
  121. partition@540000 {
  122. label = "0:DDRCONFIG";
  123. reg = <0x0540000 0x0120000>;
  124. read-only;
  125. };
  126. partition@660000 {
  127. label = "0:SSD";
  128. reg = <0x0660000 0x0120000>;
  129. read-only;
  130. };
  131. partition@780000 {
  132. label = "0:TZ";
  133. reg = <0x0780000 0x0280000>;
  134. read-only;
  135. };
  136. partition@a00000 {
  137. label = "0:RPM";
  138. reg = <0x0a00000 0x0280000>;
  139. read-only;
  140. };
  141. partition@c80000 {
  142. label = "0:APPSBL";
  143. reg = <0x0c80000 0x0500000>;
  144. read-only;
  145. };
  146. partition@1180000 {
  147. label = "0:APPSBLENV";
  148. reg = <0x1180000 0x0080000>;
  149. };
  150. partition@1200000 {
  151. label = "0:ART";
  152. reg = <0x1200000 0x0140000>;
  153. };
  154. partition@1340000 {
  155. label = "ubi";
  156. reg = <0x1340000 0x4000000>;
  157. };
  158. partition@5340000 {
  159. label = "0:BOOTCONFIG";
  160. reg = <0x5340000 0x0060000>;
  161. };
  162. partition@53a0000 {
  163. label = "0:SBL2_1";
  164. reg = <0x53a0000 0x0140000>;
  165. read-only;
  166. };
  167. partition@54e0000 {
  168. label = "0:SBL3_1";
  169. reg = <0x54e0000 0x0280000>;
  170. read-only;
  171. };
  172. partition@5760000 {
  173. label = "0:DDRCONFIG_1";
  174. reg = <0x5760000 0x0120000>;
  175. read-only;
  176. };
  177. partition@5880000 {
  178. label = "0:SSD_1";
  179. reg = <0x5880000 0x0120000>;
  180. read-only;
  181. };
  182. partition@59a0000 {
  183. label = "0:TZ_1";
  184. reg = <0x59a0000 0x0280000>;
  185. read-only;
  186. };
  187. partition@5c20000 {
  188. label = "0:RPM_1";
  189. reg = <0x5c20000 0x0280000>;
  190. read-only;
  191. };
  192. partition@5ea0000 {
  193. label = "0:BOOTCONFIG1";
  194. reg = <0x5ea0000 0x0060000>;
  195. };
  196. partition@5f00000 {
  197. label = "0:APPSBL_1";
  198. reg = <0x5f00000 0x0500000>;
  199. read-only;
  200. };
  201. partition@6400000 {
  202. label = "ubi_1";
  203. reg = <0x6400000 0x4000000>;
  204. };
  205. partition@a400000 {
  206. label = "unused";
  207. reg = <0xa400000 0x5c00000>;
  208. };
  209. };
  210. };
  211. };
  212. &adm_dma {
  213. status = "okay";
  214. };
  215. &mdio0 {
  216. status = "okay";
  217. pinctrl-0 = <&mdio0_pins>;
  218. pinctrl-names = "default";
  219. switch@10 {
  220. compatible = "qca,qca8337";
  221. #address-cells = <1>;
  222. #size-cells = <0>;
  223. reg = <0x10>;
  224. ports {
  225. #address-cells = <1>;
  226. #size-cells = <0>;
  227. port@0 {
  228. reg = <0>;
  229. label = "cpu";
  230. ethernet = <&gmac1>;
  231. phy-mode = "rgmii";
  232. tx-internal-delay-ps = <1000>;
  233. rx-internal-delay-ps = <1000>;
  234. fixed-link {
  235. speed = <1000>;
  236. full-duplex;
  237. };
  238. };
  239. port@1 {
  240. reg = <1>;
  241. label = "lan1";
  242. phy-mode = "internal";
  243. phy-handle = <&phy_port1>;
  244. };
  245. port@2 {
  246. reg = <2>;
  247. label = "lan2";
  248. phy-mode = "internal";
  249. phy-handle = <&phy_port2>;
  250. };
  251. port@3 {
  252. reg = <3>;
  253. label = "lan3";
  254. phy-mode = "internal";
  255. phy-handle = <&phy_port3>;
  256. };
  257. port@4 {
  258. reg = <4>;
  259. label = "lan4";
  260. phy-mode = "internal";
  261. phy-handle = <&phy_port4>;
  262. };
  263. port@5 {
  264. reg = <5>;
  265. label = "wan";
  266. phy-mode = "internal";
  267. phy-handle = <&phy_port5>;
  268. };
  269. port@6 {
  270. reg = <6>;
  271. label = "cpu";
  272. ethernet = <&gmac2>;
  273. phy-mode = "sgmii";
  274. qca,sgmii-enable-pll;
  275. fixed-link {
  276. speed = <1000>;
  277. full-duplex;
  278. };
  279. };
  280. };
  281. mdio {
  282. #address-cells = <1>;
  283. #size-cells = <0>;
  284. phy_port1: phy@0 {
  285. reg = <0>;
  286. };
  287. phy_port2: phy@1 {
  288. reg = <1>;
  289. };
  290. phy_port3: phy@2 {
  291. reg = <2>;
  292. };
  293. phy_port4: phy@3 {
  294. reg = <3>;
  295. };
  296. phy_port5: phy@4 {
  297. reg = <4>;
  298. };
  299. };
  300. };
  301. };
  302. &gmac1 {
  303. status = "okay";
  304. pinctrl-0 = <&rgmii2_pins>;
  305. pinctrl-names = "default";
  306. phy-mode = "rgmii";
  307. qcom,id = <1>;
  308. fixed-link {
  309. speed = <1000>;
  310. full-duplex;
  311. };
  312. };
  313. &gmac2 {
  314. status = "okay";
  315. phy-mode = "sgmii";
  316. qcom,id = <2>;
  317. fixed-link {
  318. speed = <1000>;
  319. full-duplex;
  320. };
  321. };
  322. &gsbi4_serial {
  323. pinctrl-0 = <&uart0_pins>;
  324. pinctrl-names = "default";
  325. };
  326. &flash {
  327. compatible = "jedec,spi-nor";
  328. };
  329. &sata_phy {
  330. status = "disabled";
  331. };
  332. &sata {
  333. status = "disabled";
  334. };
  335. &hs_phy_0 {
  336. status = "okay";
  337. };
  338. &ss_phy_0 {
  339. status = "okay";
  340. rx_eq = <2>;
  341. tx_deamp_3_5db = <32>;
  342. mpll = <160>;
  343. };
  344. &usb3_0 {
  345. status = "okay";
  346. };
  347. &hs_phy_1 {
  348. status = "okay";
  349. };
  350. &ss_phy_1 {
  351. status = "okay";
  352. rx_eq = <2>;
  353. tx_deamp_3_5db = <32>;
  354. mpll = <160>;
  355. };
  356. &usb3_1 {
  357. status = "okay";
  358. };
  359. &pcie0 {
  360. status = "okay";
  361. /delete-property/ pinctrl-0;
  362. /delete-property/ pinctrl-names;
  363. /delete-property/ perst-gpios;
  364. };
  365. &pcie1 {
  366. status = "okay";
  367. };
  368. &pcie2 {
  369. status = "okay";
  370. /delete-property/ pinctrl-0;
  371. /delete-property/ pinctrl-names;
  372. /delete-property/ perst-gpios;
  373. };
  374. &qcom_pinmux {
  375. pinctrl-names = "default";
  376. pinctrl-0 = <&state_default>;
  377. state_default: pinctrl0 {
  378. pcie0_pcie2_perst {
  379. pins = "gpio3";
  380. function = "gpio";
  381. drive-strength = <2>;
  382. bias-disable;
  383. output-high;
  384. };
  385. };
  386. led_pins: led_pins {
  387. mux {
  388. pins = "gpio7", "gpio8", "gpio9", "gpio22",
  389. "gpio23", "gpio24", "gpio25", "gpio53";
  390. function = "gpio";
  391. drive-strength = <2>;
  392. bias-pull-up;
  393. };
  394. };
  395. button_pins: button_pins {
  396. mux {
  397. pins = "gpio54";
  398. function = "gpio";
  399. drive-strength = <2>;
  400. bias-pull-up;
  401. };
  402. };
  403. beeper_pins: beeper_pins {
  404. mux {
  405. pins = "gpio55";
  406. function = "gpio";
  407. drive-strength = <2>;
  408. bias-pull-up;
  409. };
  410. };
  411. rpm_pins: rpm_pins {
  412. mux {
  413. pins = "gpio12", "gpio13";
  414. function = "gsbi4";
  415. drive-strength = <10>;
  416. bias-disable;
  417. };
  418. };
  419. uart0_pins: uart0_pins {
  420. mux {
  421. pins = "gpio10", "gpio11";
  422. function = "gsbi4";
  423. drive-strength = <10>;
  424. bias-disable;
  425. };
  426. };
  427. spi_pins: spi_pins {
  428. mux {
  429. pins = "gpio18", "gpio19";
  430. function = "gsbi5";
  431. drive-strength = <10>;
  432. bias-pull-down;
  433. };
  434. clk {
  435. pins = "gpio21";
  436. function = "gsbi5";
  437. drive-strength = <12>;
  438. bias-pull-down;
  439. };
  440. cs {
  441. pins = "gpio20";
  442. function = "gpio";
  443. drive-strength = <10>;
  444. bias-pull-up;
  445. };
  446. };
  447. };
  448. &tcsr {
  449. qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
  450. };