qcom-ipq8065-nbg6817.dts 6.1 KB

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  1. #include "qcom-ipq8065-smb208.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. #include <dt-bindings/leds/common.h>
  4. / {
  5. model = "ZyXEL NBG6817";
  6. compatible = "zyxel,nbg6817", "qcom,ipq8065", "qcom,ipq8064";
  7. memory@0 {
  8. reg = <0x42000000 0x1e000000>;
  9. device_type = "memory";
  10. };
  11. aliases {
  12. mdio-gpio0 = &mdio0;
  13. sdcc1 = &sdcc1;
  14. led-boot = &power;
  15. led-failsafe = &power;
  16. led-running = &power;
  17. led-upgrade = &power;
  18. };
  19. chosen {
  20. bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
  21. append-rootblock = "root=/dev/mmcblk0p";
  22. };
  23. keys {
  24. compatible = "gpio-keys";
  25. pinctrl-0 = <&button_pins>;
  26. pinctrl-names = "default";
  27. wifi {
  28. label = "wifi";
  29. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
  30. linux,code = <KEY_RFKILL>;
  31. linux,input-type = <EV_SW>;
  32. debounce-interval = <60>;
  33. wakeup-source;
  34. };
  35. reset {
  36. label = "reset";
  37. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  38. linux,code = <KEY_RESTART>;
  39. debounce-interval = <60>;
  40. wakeup-source;
  41. };
  42. wps {
  43. label = "wps";
  44. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  45. linux,code = <KEY_WPS_BUTTON>;
  46. debounce-interval = <60>;
  47. wakeup-source;
  48. };
  49. };
  50. leds {
  51. compatible = "gpio-leds";
  52. pinctrl-0 = <&led_pins>;
  53. pinctrl-names = "default";
  54. internet {
  55. label = "white:internet";
  56. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  57. };
  58. power: power {
  59. function = LED_FUNCTION_POWER;
  60. color = <LED_COLOR_ID_WHITE>;
  61. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  62. default-state = "keep";
  63. };
  64. wifi2g {
  65. label = "amber:wifi2g";
  66. gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
  67. };
  68. /* wifi2g amber from the manual is missing */
  69. wifi5g {
  70. label = "amber:wifi5g";
  71. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  72. };
  73. /* wifi5g amber from the manual is missing */
  74. };
  75. };
  76. &qcom_pinmux {
  77. button_pins: button_pins {
  78. mux {
  79. pins = "gpio53", "gpio54", "gpio65";
  80. function = "gpio";
  81. drive-strength = <2>;
  82. bias-pull-up;
  83. };
  84. };
  85. led_pins: led_pins {
  86. mux {
  87. pins = "gpio9", "gpio26", "gpio33", "gpio64";
  88. function = "gpio";
  89. drive-strength = <2>;
  90. bias-pull-down;
  91. };
  92. };
  93. mdio0_pins: mdio0-pins {
  94. clk {
  95. pins = "gpio1";
  96. input-disable;
  97. };
  98. };
  99. rgmii2_pins: rgmii2-pins {
  100. tx {
  101. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  102. input-disable;
  103. };
  104. };
  105. spi_pins: spi_pins {
  106. cs {
  107. pins = "gpio20";
  108. drive-strength = <12>;
  109. };
  110. };
  111. usb0_pwr_en_pins: usb0_pwr_en_pins {
  112. mux {
  113. pins = "gpio16", "gpio17";
  114. function = "gpio";
  115. drive-strength = <12>;
  116. };
  117. pwr {
  118. pins = "gpio17";
  119. bias-pull-down;
  120. output-high;
  121. };
  122. ovc {
  123. pins = "gpio16";
  124. bias-pull-up;
  125. };
  126. };
  127. usb1_pwr_en_pins: usb1_pwr_en_pins {
  128. mux {
  129. pins = "gpio14", "gpio15";
  130. function = "gpio";
  131. drive-strength = <12>;
  132. };
  133. pwr {
  134. pins = "gpio14";
  135. bias-pull-down;
  136. output-high;
  137. };
  138. ovc {
  139. pins = "gpio15";
  140. bias-pull-up;
  141. };
  142. };
  143. };
  144. &gsbi5 {
  145. qcom,mode = <GSBI_PROT_SPI>;
  146. status = "okay";
  147. spi4: spi@1a280000 {
  148. status = "okay";
  149. pinctrl-0 = <&spi_pins>;
  150. pinctrl-names = "default";
  151. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  152. m25p80@0 {
  153. compatible = "jedec,spi-nor";
  154. #address-cells = <1>;
  155. #size-cells = <1>;
  156. spi-max-frequency = <51200000>;
  157. reg = <0>;
  158. partitions {
  159. compatible = "qcom,smem-part";
  160. };
  161. };
  162. };
  163. };
  164. &hs_phy_0 {
  165. status = "okay";
  166. };
  167. &ss_phy_0 {
  168. status = "okay";
  169. };
  170. &usb3_0 {
  171. status = "okay";
  172. pinctrl-0 = <&usb0_pwr_en_pins>;
  173. pinctrl-names = "default";
  174. };
  175. &hs_phy_1 {
  176. status = "okay";
  177. };
  178. &ss_phy_1 {
  179. status = "okay";
  180. };
  181. &usb3_1 {
  182. status = "okay";
  183. pinctrl-0 = <&usb1_pwr_en_pins>;
  184. pinctrl-names = "default";
  185. };
  186. &pcie0 {
  187. status = "okay";
  188. reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
  189. pinctrl-0 = <&pcie0_pins>;
  190. pinctrl-names = "default";
  191. };
  192. &pcie1 {
  193. status = "okay";
  194. reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
  195. pinctrl-0 = <&pcie1_pins>;
  196. pinctrl-names = "default";
  197. max-link-speed = <1>;
  198. };
  199. &mdio0 {
  200. status = "okay";
  201. pinctrl-0 = <&mdio0_pins>;
  202. pinctrl-names = "default";
  203. switch@10 {
  204. compatible = "qca,qca8337";
  205. #address-cells = <1>;
  206. #size-cells = <0>;
  207. reg = <0x10>;
  208. ports {
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. port@0 {
  212. reg = <0>;
  213. label = "cpu";
  214. ethernet = <&gmac1>;
  215. phy-mode = "rgmii";
  216. tx-internal-delay-ps = <1000>;
  217. rx-internal-delay-ps = <1000>;
  218. fixed-link {
  219. speed = <1000>;
  220. full-duplex;
  221. };
  222. };
  223. port@1 {
  224. reg = <1>;
  225. label = "lan1";
  226. phy-mode = "internal";
  227. phy-handle = <&phy_port1>;
  228. };
  229. port@2 {
  230. reg = <2>;
  231. label = "lan2";
  232. phy-mode = "internal";
  233. phy-handle = <&phy_port2>;
  234. };
  235. port@3 {
  236. reg = <3>;
  237. label = "lan3";
  238. phy-mode = "internal";
  239. phy-handle = <&phy_port3>;
  240. };
  241. port@4 {
  242. reg = <4>;
  243. label = "lan4";
  244. phy-mode = "internal";
  245. phy-handle = <&phy_port4>;
  246. };
  247. port@5 {
  248. reg = <5>;
  249. label = "wan";
  250. phy-mode = "internal";
  251. phy-handle = <&phy_port5>;
  252. };
  253. port@6 {
  254. reg = <6>;
  255. label = "cpu";
  256. ethernet = <&gmac2>;
  257. phy-mode = "sgmii";
  258. qca,sgmii-enable-pll;
  259. fixed-link {
  260. speed = <1000>;
  261. full-duplex;
  262. };
  263. };
  264. };
  265. mdio {
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. phy_port1: phy@0 {
  269. reg = <0>;
  270. };
  271. phy_port2: phy@1 {
  272. reg = <1>;
  273. };
  274. phy_port3: phy@2 {
  275. reg = <2>;
  276. };
  277. phy_port4: phy@3 {
  278. reg = <3>;
  279. };
  280. phy_port5: phy@4 {
  281. reg = <4>;
  282. };
  283. };
  284. };
  285. };
  286. &gmac1 {
  287. status = "okay";
  288. phy-mode = "rgmii";
  289. qcom,id = <1>;
  290. qcom,phy_mdio_addr = <4>;
  291. qcom,poll_required = <0>;
  292. qcom,rgmii_delay = <1>;
  293. qcom,phy_mii_type = <0>;
  294. qcom,emulation = <0>;
  295. qcom,irq = <255>;
  296. mdiobus = <&mdio0>;
  297. pinctrl-0 = <&rgmii2_pins>;
  298. pinctrl-names = "default";
  299. fixed-link {
  300. speed = <1000>;
  301. full-duplex;
  302. };
  303. };
  304. &gmac2 {
  305. status = "okay";
  306. phy-mode = "sgmii";
  307. qcom,id = <2>;
  308. qcom,phy_mdio_addr = <0>; /* none */
  309. qcom,poll_required = <0>; /* no polling */
  310. qcom,rgmii_delay = <0>;
  311. qcom,phy_mii_type = <1>;
  312. qcom,emulation = <0>;
  313. qcom,irq = <258>;
  314. mdiobus = <&mdio0>;
  315. fixed-link {
  316. speed = <1000>;
  317. full-duplex;
  318. };
  319. };
  320. &sdcc1 {
  321. status = "okay";
  322. };
  323. &adm_dma {
  324. status = "okay";
  325. };