openwrt/target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8065-nighthawk.dtsi

#include "qcom-ipq8065-smb208.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	memory@0 {
		reg = <0x42000000 0x1e000000>;
		device_type = "memory";
	};

	reserved-memory {
		rsvd@5fe00000 {
			reg = <0x5fe00000 0x200000>;
			reusable;
		};

		ramoops@42100000 {
			compatible = "ramoops";
			reg = <0x42100000 0x40000>;
			record-size = <0x4000>;
			console-size = <0x4000>;
			ftrace-size = <0x4000>;
			pmsg-size = <0x4000>;
		};
	};

	aliases {
		label-mac-device = &gmac2;

		led-boot = &power_white;
		led-failsafe = &power_amber;
		led-running = &power_white;
		led-upgrade = &power_amber;

		mdio-gpio0 = &mdio0;
	};

	keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&button_pins>;
		pinctrl-names = "default";

		wifi {
			label = "wifi";
			gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RFKILL>;
			debounce-interval = <60>;
			wakeup-source;
		};

		reset {
			label = "reset";
			gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
			debounce-interval = <60>;
			wakeup-source;
		};

		wps {
			label = "wps";
			gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
			debounce-interval = <60>;
			wakeup-source;
		};
	};

	leds: leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&led_pins>;
		pinctrl-names = "default";

		power_white: power_white {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		power_amber: power_amber {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_AMBER>;
			gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
		};

		wan_white {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
		};

		wan_amber {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_AMBER>;
			gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
		};

		wifi {
			label = "white:wifi";
			gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
		};

		wps {
			function = LED_FUNCTION_WPS;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
		};
	};
};

&qcom_pinmux {
	button_pins: button_pins {
		mux {
			pins = "gpio6", "gpio54", "gpio65";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-up;
		};
	};

	led_pins: led_pins {
		mux {
			pins = "gpio7", "gpio8", "gpio9",
				"gpio22", "gpio23", "gpio24",
				"gpio26", "gpio53", "gpio64";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-down;
		};
	};

	mdio0_pins: mdio0-pins {
		clk {
			pins = "gpio1";
			input-disable;
		};
	};

	rgmii2_pins: rgmii2-pins {
		tx {
			pins = "gpio27", "gpio28", "gpio29",
				"gpio30", "gpio31", "gpio32";
			input-disable;
		};
	};

	spi_pins: spi_pins {
		mux {
			pins = "gpio18", "gpio19", "gpio21";
			function = "gsbi5";
			bias-pull-down;
		};

		data {
			pins = "gpio18", "gpio19";
			drive-strength = <10>;
		};

		cs {
			pins = "gpio20";
			drive-strength = <10>;
			bias-pull-up;
		};

		clk {
			pins = "gpio21";
			drive-strength = <12>;
		};
	};

	spi6_pins: spi6_pins {
		mux {
			pins = "gpio55", "gpio56", "gpio58";
			function = "gsbi6";
			bias-pull-down;
		};

		mosi {
			pins = "gpio55";
			drive-strength = <12>;
		};

		miso {
			pins = "gpio56";
			drive-strength = <14>;
		};

		cs {
			pins = "gpio57";
			drive-strength = <12>;
			bias-pull-up;
		};

		clk {
			pins = "gpio58";
			drive-strength = <12>;
		};

		reset {
			pins = "gpio33";
			drive-strength = <10>;
			bias-pull-down;
			output-high;
		};
	};

	usb0_pwr_en_pins: usb0_pwr_en_pins {
		mux {
			pins = "gpio15";
			function = "gpio";
			drive-strength = <12>;
			bias-pull-down;
			output-high;
		};
	};

	usb1_pwr_en_pins: usb1_pwr_en_pins {
		mux {
			pins = "gpio16", "gpio68";
			function = "gpio";
			drive-strength = <12>;
			bias-pull-down;
			output-high;
		};
	};
};

&nand {
	status = "okay";

	nand@0 {
		reg = <0>;
		compatible = "qcom,nandcs";

		nand-ecc-strength = <4>;
		nand-bus-width = <8>;
		nand-ecc-step-size = <512>;

		nand-is-boot-medium;
		qcom,boot-partitions = <0x0 0x1180000>;

		partitions: partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "qcadata";
				reg = <0x0000000 0x0c80000>;
				read-only;
			};

			partition@c80000 {
				label = "APPSBL";
				reg = <0x0c80000 0x0500000>;
				read-only;
			};

			partition@1180000 {
				label = "APPSBLENV";
				reg = <0x1180000 0x0080000>;
				read-only;
			};

			art: partition@1200000 {
				label = "art";
				reg = <0x1200000 0x0140000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_art_0: macaddr@0 {
						reg = <0x0 0x6>;
					};

					macaddr_art_6: macaddr@6 {
						compatible = "mac-base";
						reg = <0x6 0x6>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_art_c: macaddr@c {
						reg = <0xc 0x6>;
					};

					precal_art_1000: precal@1000 {
						reg = <0x1000 0x2f20>;
					};

					precal_art_5000: precal@5000 {
						reg = <0x5000 0x2f20>;
					};
				};
			};

			partition@1340000 {
				label = "artbak";
				reg = <0x1340000 0x0140000>;
				read-only;
			};

			partition@1480000 {
				label = "kernel";
				reg = <0x1480000 0x0400000>;
			};
		};
	};
};

&mdio0 {
	status = "okay";

	pinctrl-0 = <&mdio0_pins>;
	pinctrl-names = "default";

	switch@10 {
		compatible = "qca,qca8337";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x10>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "cpu";
				ethernet = <&gmac1>;
				phy-mode = "rgmii";
				tx-internal-delay-ps = <1000>;
				rx-internal-delay-ps = <1000>;

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

			port@1 {
				reg = <1>;
				label = "lan4";
				phy-mode = "internal";
				phy-handle = <&phy_port1>;
			};

			port@2 {
				reg = <2>;
				label = "lan3";
				phy-mode = "internal";
				phy-handle = <&phy_port2>;
			};

			port@3 {
				reg = <3>;
				label = "lan2";
				phy-mode = "internal";
				phy-handle = <&phy_port3>;
			};

			port@4 {
				reg = <4>;
				label = "lan1";
				phy-mode = "internal";
				phy-handle = <&phy_port4>;
			};

			port@5 {
				reg = <5>;
				label = "wan";
				phy-mode = "internal";
				phy-handle = <&phy_port5>;
			};

			port@6 {
				reg = <6>;
				label = "cpu";
				ethernet = <&gmac2>;
				phy-mode = "sgmii";
				qca,sgmii-enable-pll;

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};
		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			phy_port1: phy@0 {
				reg = <0>;
			};

			phy_port2: phy@1 {
				reg = <1>;
			};

			phy_port3: phy@2 {
				reg = <2>;
			};

			phy_port4: phy@3 {
				reg = <3>;
			};

			phy_port5: phy@4 {
				reg = <4>;
			};
		};
	};
};

&gmac1 {
	status = "okay";

	phy-mode = "rgmii";
	qcom,id = <1>;
	qcom,phy_mdio_addr = <4>;
	qcom,poll_required = <0>;
	qcom,rgmii_delay = <1>;
	qcom,phy_mii_type = <0>;
	qcom,emulation = <0>;
	qcom,irq = <255>;
	mdiobus = <&mdio0>;

	pinctrl-0 = <&rgmii2_pins>;
	pinctrl-names = "default";

	nvmem-cells = <&macaddr_art_6 0>;
	nvmem-cell-names = "mac-address";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&gmac2 {
	status = "okay";

	phy-mode = "sgmii";
	qcom,id = <2>;
	qcom,phy_mdio_addr = <0>;	/* none */
	qcom,poll_required = <0>;	/* no polling */
	qcom,rgmii_delay = <0>;
	qcom,phy_mii_type = <1>;
	qcom,emulation = <0>;
	qcom,irq = <258>;
	mdiobus = <&mdio0>;

	nvmem-cells = <&macaddr_art_0>;
	nvmem-cell-names = "mac-address";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&adm_dma {
	status = "okay";
};

&sata_phy {
	status = "okay";
};

&sata {
	status = "okay";
};

&hs_phy_0 {
	status = "okay";
};

&ss_phy_0 {
	status = "okay";
};

&usb3_0 {
	status = "okay";

	pinctrl-0 = <&usb0_pwr_en_pins>;
	pinctrl-names = "default";
};

&hs_phy_1 {
	status = "okay";
};

&ss_phy_1 {
	status = "okay";
};

&usb3_1 {
	status = "okay";

	pinctrl-0 = <&usb1_pwr_en_pins>;
	pinctrl-names = "default";
};

&pcie0 {
	status = "okay";

	bridge@0,0 {
		reg = <0x00000000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;
		ranges;

		wifi0: wifi@1,0 {
			compatible = "pci168c,0046";
			reg = <0x00010000 0 0 0 0>;
		};
	};
};

&pcie1 {
	status = "okay";

	max-link-speed = <1>;

	bridge@0,0 {
		reg = <0x00000000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;
		ranges;

		wifi1: wifi@1,0 {
			compatible = "pci168c,0046";
			reg = <0x00010000 0 0 0 0>;
		};
	};
};