qcom-ipq8064-ap148.dts 2.8 KB

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  1. #include "qcom-ipq8064-v1.0.dtsi"
  2. / {
  3. model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
  4. compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
  5. memory@0 {
  6. reg = <0x42000000 0x1e000000>;
  7. device_type = "memory";
  8. };
  9. reserved-memory {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. ranges;
  13. rsvd@41200000 {
  14. reg = <0x41200000 0x300000>;
  15. no-map;
  16. };
  17. };
  18. aliases {
  19. mdio-gpio0 = &mdio0;
  20. };
  21. };
  22. &adm_dma {
  23. status = "okay";
  24. };
  25. &flash {
  26. partitions {
  27. compatible = "qcom,smem-part";
  28. };
  29. };
  30. &hs_phy_0 {
  31. status = "okay";
  32. };
  33. &ss_phy_0 {
  34. status = "okay";
  35. };
  36. &usb3_0 {
  37. status = "okay";
  38. };
  39. &hs_phy_1 {
  40. status = "okay";
  41. };
  42. &ss_phy_1 {
  43. status = "okay";
  44. };
  45. &usb3_1 {
  46. status = "okay";
  47. };
  48. &pcie0 {
  49. status = "okay";
  50. };
  51. &pcie1 {
  52. status = "okay";
  53. max-link-speed = <1>;
  54. };
  55. &nand {
  56. status = "okay";
  57. nand@0 {
  58. reg = <0>;
  59. compatible = "qcom,nandcs";
  60. nand-ecc-strength = <4>;
  61. nand-bus-width = <8>;
  62. nand-ecc-step-size = <512>;
  63. partitions {
  64. compatible = "qcom,smem-part";
  65. };
  66. };
  67. };
  68. &mdio0 {
  69. status = "okay";
  70. pinctrl-0 = <&mdio0_pins>;
  71. pinctrl-names = "default";
  72. switch@10 {
  73. compatible = "qca,qca8337";
  74. #address-cells = <1>;
  75. #size-cells = <0>;
  76. reg = <0x10>;
  77. ports {
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. port@0 {
  81. reg = <0>;
  82. label = "cpu";
  83. ethernet = <&gmac1>;
  84. phy-mode = "rgmii";
  85. tx-internal-delay-ps = <1000>;
  86. rx-internal-delay-ps = <1000>;
  87. fixed-link {
  88. speed = <1000>;
  89. full-duplex;
  90. };
  91. };
  92. port@1 {
  93. reg = <1>;
  94. label = "lan1";
  95. phy-mode = "internal";
  96. phy-handle = <&phy_port1>;
  97. };
  98. port@2 {
  99. reg = <2>;
  100. label = "lan2";
  101. phy-mode = "internal";
  102. phy-handle = <&phy_port2>;
  103. };
  104. port@3 {
  105. reg = <3>;
  106. label = "lan3";
  107. phy-mode = "internal";
  108. phy-handle = <&phy_port3>;
  109. };
  110. port@4 {
  111. reg = <4>;
  112. label = "lan4";
  113. phy-mode = "internal";
  114. phy-handle = <&phy_port4>;
  115. };
  116. port@5 {
  117. reg = <5>;
  118. label = "wan";
  119. phy-mode = "internal";
  120. phy-handle = <&phy_port5>;
  121. };
  122. /*
  123. port@6 {
  124. reg = <0>;
  125. label = "cpu";
  126. ethernet = <&gmac2>;
  127. phy-mode = "rgmii";
  128. fixed-link {
  129. speed = <1000>;
  130. full-duplex;
  131. pause;
  132. asym-pause;
  133. };
  134. };
  135. */
  136. };
  137. mdio {
  138. #address-cells = <1>;
  139. #size-cells = <0>;
  140. phy_port1: phy@0 {
  141. reg = <0>;
  142. };
  143. phy_port2: phy@1 {
  144. reg = <1>;
  145. };
  146. phy_port3: phy@2 {
  147. reg = <2>;
  148. };
  149. phy_port4: phy@3 {
  150. reg = <3>;
  151. };
  152. phy_port5: phy@4 {
  153. reg = <4>;
  154. };
  155. };
  156. };
  157. };
  158. &gmac1 {
  159. status = "okay";
  160. phy-mode = "rgmii";
  161. qcom,id = <1>;
  162. pinctrl-0 = <&rgmii2_pins>;
  163. pinctrl-names = "default";
  164. fixed-link {
  165. speed = <1000>;
  166. full-duplex;
  167. };
  168. };
  169. &gmac2 {
  170. status = "okay";
  171. phy-mode = "sgmii";
  172. qcom,id = <2>;
  173. fixed-link {
  174. speed = <1000>;
  175. full-duplex;
  176. };
  177. };