P2812HNUFX.dtsi 5.7 KB

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  1. #include "vr9.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. #include <dt-bindings/mips/lantiq_rcu_gphy.h>
  4. / {
  5. compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
  6. chosen {
  7. bootargs = "console=ttyLTQ0,115200";
  8. };
  9. aliases {
  10. led-boot = &power_green;
  11. led-failsafe = &power_red;
  12. led-running = &power_green;
  13. led-dsl = &dsl_green;
  14. led-internet = &internet_green;
  15. led-wifi = &wireless_green;
  16. };
  17. memory@0 {
  18. reg = <0x0 0x8000000>;
  19. };
  20. gpio-keys-polled {
  21. compatible = "gpio-keys-polled";
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. poll-interval = <100>;
  25. reset {
  26. label = "reset";
  27. gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  28. linux,code = <KEY_RESTART>;
  29. };
  30. rfkill {
  31. label = "rfkill";
  32. gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  33. linux,code = <KEY_RFKILL>;
  34. };
  35. };
  36. gpio-leds {
  37. compatible = "gpio-leds";
  38. internet_red {
  39. label = "p2812hnufx:red:internet";
  40. gpios = <&stp 16 GPIO_ACTIVE_LOW>;
  41. };
  42. internet_green: internet_green {
  43. label = "p2812hnufx:green:internet";
  44. gpios = <&stp 17 GPIO_ACTIVE_LOW>;
  45. };
  46. dsl_green: dsl_green {
  47. label = "p2812hnufx:green:dsl";
  48. gpios = <&stp 18 GPIO_ACTIVE_LOW>;
  49. };
  50. dsl_orange {
  51. label = "p2812hnufx:orange:dsl";
  52. gpios = <&stp 19 GPIO_ACTIVE_LOW>;
  53. };
  54. wireless_orange {
  55. label = "p2812hnufx:orange:wlan";
  56. gpios = <&stp 20 GPIO_ACTIVE_LOW>;
  57. };
  58. wireless_green: wireless_green {
  59. label = "p2812hnufx:green:wlan";
  60. gpios = <&stp 21 GPIO_ACTIVE_LOW>;
  61. };
  62. power_red: power {
  63. label = "p2812hnufx:red:power";
  64. gpios = <&stp 22 GPIO_ACTIVE_LOW>;
  65. };
  66. power_green: power2 {
  67. label = "p2812hnufx:green:power";
  68. gpios = <&stp 23 GPIO_ACTIVE_LOW>;
  69. default-state = "keep";
  70. };
  71. phone1 {
  72. label = "p2812hnufx:green:phone";
  73. gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  74. };
  75. phone1warn {
  76. label = "p2812hnufx:orange:phone";
  77. gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  78. };
  79. phone2warn {
  80. label = "p2812hnufx:orange:phone2";
  81. gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
  82. };
  83. phone2 {
  84. label = "p2812hnufx:green:phone2";
  85. gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
  86. };
  87. };
  88. usb_vbus: regulator-usb-vbus {
  89. compatible = "regulator-fixed";
  90. regulator-name = "USB_VBUS";
  91. regulator-min-microvolt = <5000000>;
  92. regulator-max-microvolt = <5000000>;
  93. gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  94. enable-active-high;
  95. };
  96. };
  97. &eth0 {
  98. lan: interface@0 {
  99. compatible = "lantiq,xrx200-pdi";
  100. #address-cells = <1>;
  101. #size-cells = <0>;
  102. reg = <0>;
  103. mac-address = [ 00 11 22 33 44 55 ];
  104. lantiq,switch;
  105. ethernet@0 {
  106. compatible = "lantiq,xrx200-pdi-port";
  107. reg = <0>;
  108. phy-mode = "rgmii";
  109. phy-handle = <&phy0>;
  110. };
  111. ethernet@1 {
  112. compatible = "lantiq,xrx200-pdi-port";
  113. reg = <1>;
  114. phy-mode = "rgmii";
  115. phy-handle = <&phy1>;
  116. };
  117. ethernet@2 {
  118. compatible = "lantiq,xrx200-pdi-port";
  119. reg = <2>;
  120. phy-mode = "gmii";
  121. phy-handle = <&phy11>;
  122. };
  123. ethernet@4 {
  124. compatible = "lantiq,xrx200-pdi-port";
  125. reg = <4>;
  126. phy-mode = "gmii";
  127. phy-handle = <&phy13>;
  128. };
  129. ethernet@5 {
  130. compatible = "lantiq,xrx200-pdi-port";
  131. reg = <5>;
  132. phy-mode = "rgmii";
  133. phy-handle = <&phy5>;
  134. };
  135. };
  136. mdio@0 {
  137. #address-cells = <1>;
  138. #size-cells = <0>;
  139. compatible = "lantiq,xrx200-mdio";
  140. reg = <0>;
  141. phy0: ethernet-phy@0 {
  142. reg = <0x0>;
  143. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  144. };
  145. phy1: ethernet-phy@1 {
  146. reg = <0x1>;
  147. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  148. };
  149. phy5: ethernet-phy@5 {
  150. reg = <0x5>;
  151. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  152. };
  153. phy11: ethernet-phy@11 {
  154. reg = <0x11>;
  155. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  156. };
  157. phy13: ethernet-phy@13 {
  158. reg = <0x13>;
  159. compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  160. };
  161. };
  162. };
  163. &gphy0 {
  164. lantiq,gphy-mode = <GPHY_MODE_GE>;
  165. };
  166. &gphy1 {
  167. lantiq,gphy-mode = <GPHY_MODE_GE>;
  168. };
  169. &gpio {
  170. pinctrl-names = "default";
  171. pinctrl-0 = <&state_default>;
  172. state_default: pinmux {
  173. exin3 {
  174. lantiq,groups = "exin3";
  175. lantiq,function = "exin";
  176. };
  177. mdio {
  178. lantiq,groups = "mdio";
  179. lantiq,function = "mdio";
  180. };
  181. gphy-leds {
  182. lantiq,groups = "gphy0 led1", "gphy1 led1",
  183. "gphy0 led2", "gphy1 led2";
  184. lantiq,function = "gphy";
  185. lantiq,pull = <2>;
  186. lantiq,open-drain = <0>;
  187. lantiq,output = <1>;
  188. };
  189. stp {
  190. lantiq,groups = "stp";
  191. lantiq,function = "stp";
  192. lantiq,pull = <2>;
  193. lantiq,open-drain = <0>;
  194. lantiq,output = <1>;
  195. };
  196. pci-in {
  197. lantiq,groups = "req1";
  198. lantiq,function = "pci";
  199. lantiq,output = <0>;
  200. lantiq,open-drain = <1>;
  201. lantiq,pull = <2>;
  202. };
  203. pci-out {
  204. lantiq,groups = "gnt1";
  205. lantiq,function = "pci";
  206. lantiq,output = <1>;
  207. lantiq,open-drain = <0>;
  208. lantiq,pull = <0>;
  209. };
  210. pci_rst {
  211. lantiq,pins = "io21";
  212. lantiq,output = <1>;
  213. lantiq,open-drain = <0>;
  214. lantiq,pull = <2>;
  215. };
  216. pcie-rst {
  217. lantiq,pins = "io38";
  218. lantiq,pull = <0>;
  219. lantiq,output = <1>;
  220. };
  221. ifxhcd-rst {
  222. lantiq,pins = "io33";
  223. lantiq,pull = <0>;
  224. lantiq,open-drain = <0>;
  225. lantiq,output = <1>;
  226. };
  227. nand_out {
  228. lantiq,groups = "nand cle", "nand ale";
  229. lantiq,function = "ebu";
  230. lantiq,output = <1>;
  231. lantiq,open-drain = <0>;
  232. lantiq,pull = <0>;
  233. };
  234. nand_cs1 {
  235. lantiq,groups = "nand cs1";
  236. lantiq,function = "ebu";
  237. lantiq,open-drain = <0>;
  238. lantiq,pull = <0>;
  239. };
  240. };
  241. };
  242. &pci0 {
  243. status = "okay";
  244. gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
  245. };
  246. &stp {
  247. status = "okay";
  248. lantiq,shadow = <0xffffff>;
  249. lantiq,groups = <0x7>;
  250. lantiq,dsl = <0x0>;
  251. lantiq,phy1 = <0x0>;
  252. lantiq,phy2 = <0x0>;
  253. };
  254. &usb_phy0 {
  255. status = "okay";
  256. };
  257. &usb_phy1 {
  258. status = "okay";
  259. };
  260. &usb0 {
  261. status = "okay";
  262. vbus-supply = <&usb_vbus>;
  263. };
  264. &usb1 {
  265. status = "okay";
  266. vbus-supply = <&usb_vbus>;
  267. };