bcm6358.dtsi 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /dts-v1/;
  3. #include <dt-bindings/clock/bcm6358-clock.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h>
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. #include <dt-bindings/reset/bcm6358-reset.h>
  9. / {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. compatible = "brcm,bcm6358";
  13. aliases {
  14. pflash = &pflash;
  15. pinctrl = &pinctrl;
  16. serial0 = &uart0;
  17. serial1 = &uart1;
  18. spi0 = &lsspi;
  19. };
  20. chosen {
  21. bootargs = "earlycon";
  22. stdout-path = "serial0:115200n8";
  23. };
  24. clocks {
  25. periph_osc: periph-osc {
  26. compatible = "fixed-clock";
  27. #clock-cells = <0>;
  28. clock-frequency = <50000000>;
  29. clock-output-names = "periph";
  30. };
  31. };
  32. cpus {
  33. #address-cells = <1>;
  34. #size-cells = <0>;
  35. mips-hpt-frequency = <150000000>;
  36. cpu@0 {
  37. compatible = "brcm,bmips4350", "mips,mips4Kc";
  38. device_type = "cpu";
  39. reg = <0>;
  40. };
  41. cpu@1 {
  42. compatible = "brcm,bmips4350", "mips,mips4Kc";
  43. device_type = "cpu";
  44. reg = <1>;
  45. };
  46. };
  47. cpu_intc: interrupt-controller {
  48. #address-cells = <0>;
  49. compatible = "mti,cpu-interrupt-controller";
  50. interrupt-controller;
  51. #interrupt-cells = <1>;
  52. };
  53. memory@0 {
  54. device_type = "memory";
  55. reg = <0 0>;
  56. };
  57. pflash: nor@1e000000 {
  58. #address-cells = <1>;
  59. #size-cells = <1>;
  60. compatible = "cfi-flash";
  61. reg = <0x1e000000 0x2000000>;
  62. bank-width = <2>;
  63. status = "disabled";
  64. };
  65. ubus {
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. compatible = "simple-bus";
  69. ranges;
  70. periph_clk: clock-controller@fffe0004 {
  71. compatible = "brcm,bcm6358-clocks";
  72. reg = <0xfffe0004 0x4>;
  73. #clock-cells = <1>;
  74. };
  75. pll_cntl: syscon@fffe0008 {
  76. compatible = "syscon", "simple-mfd";
  77. reg = <0xfffe0008 0x4>;
  78. native-endian;
  79. syscon-reboot {
  80. compatible = "syscon-reboot";
  81. offset = <0x0>;
  82. mask = <0x1>;
  83. };
  84. };
  85. periph_intc: interrupt-controller@fffe000c {
  86. #address-cells = <1>;
  87. compatible = "brcm,bcm6345-l1-intc";
  88. reg = <0xfffe000c 0x8>,
  89. <0xfffe0038 0x8>;
  90. interrupt-controller;
  91. #interrupt-cells = <1>;
  92. interrupt-parent = <&cpu_intc>;
  93. interrupts = <2>, <3>;
  94. };
  95. ext_intc0: interrupt-controller@fffe0014 {
  96. #address-cells = <1>;
  97. compatible = "brcm,bcm6345-ext-intc";
  98. reg = <0xfffe0014 0x4>;
  99. interrupt-controller;
  100. #interrupt-cells = <2>;
  101. interrupt-parent = <&periph_intc>;
  102. interrupts = <BCM6358_IRQ_EXT0>,
  103. <BCM6358_IRQ_EXT1>,
  104. <BCM6358_IRQ_EXT2>,
  105. <BCM6358_IRQ_EXT3>;
  106. };
  107. ext_intc1: interrupt-controller@fffe001c {
  108. #address-cells = <1>;
  109. compatible = "brcm,bcm6345-ext-intc";
  110. reg = <0xfffe001c 0x4>;
  111. interrupt-controller;
  112. #interrupt-cells = <2>;
  113. interrupt-parent = <&periph_intc>;
  114. interrupts = <BCM6358_IRQ_EXT4>,
  115. <BCM6358_IRQ_EXT5>;
  116. };
  117. periph_rst: reset-controller@fffe0034 {
  118. compatible = "brcm,bcm6345-reset";
  119. reg = <0xfffe0034 0x4>;
  120. #reset-cells = <1>;
  121. };
  122. wdt: watchdog@fffe005c {
  123. compatible = "brcm,bcm7038-wdt";
  124. reg = <0xfffe005c 0xc>;
  125. clocks = <&periph_osc>;
  126. timeout-sec = <30>;
  127. };
  128. gpio_cntl: syscon@fffe0080 {
  129. #address-cells = <1>;
  130. #size-cells = <1>;
  131. compatible = "brcm,bcm6358-gpio-sysctl",
  132. "syscon", "simple-mfd";
  133. reg = <0xfffe0080 0x50>;
  134. ranges = <0 0xfffe0080 0x80>;
  135. native-endian;
  136. gpio: gpio@0 {
  137. compatible = "brcm,bcm6358-gpio";
  138. reg-names = "dirout", "dat";
  139. reg = <0x0 0x8>, <0x8 0x8>;
  140. gpio-controller;
  141. gpio-ranges = <&pinctrl 0 0 40>;
  142. #gpio-cells = <2>;
  143. };
  144. pinctrl: pinctrl@18 {
  145. compatible = "brcm,bcm6358-pinctrl";
  146. reg = <0x18 0x4>;
  147. pinctrl_ebi_cs: ebi_cs-pins {
  148. function = "ebi_cs";
  149. groups = "ebi_cs_grp";
  150. };
  151. pinctrl_uart1: uart1-pins {
  152. function = "uart1";
  153. groups = "uart1_grp";
  154. };
  155. pinctrl_serial_led: serial_led-pins {
  156. function = "serial_led";
  157. groups = "serial_led_grp";
  158. };
  159. pinctrl_legacy_led: legacy_led-pins {
  160. function = "legacy_led";
  161. groups = "legacy_led_grp";
  162. };
  163. pinctrl_led: led-pins {
  164. function = "led";
  165. groups = "led_grp";
  166. };
  167. pinctrl_spi_cs_23: spi_cs-pins {
  168. function = "spi_cs";
  169. groups = "spi_cs_grp";
  170. };
  171. pinctrl_utopia: utopia-pins {
  172. function = "utopia";
  173. groups = "utopia_grp";
  174. };
  175. pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
  176. function = "pwm_syn_clk";
  177. groups = "pwm_syn_clk_grp";
  178. };
  179. pinctrl_sys_irq: sys_irq-pins {
  180. function = "sys_irq";
  181. groups = "sys_irq_grp";
  182. };
  183. };
  184. };
  185. leds: led-controller@fffe00d0 {
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. compatible = "brcm,bcm6358-leds";
  189. reg = <0xfffe00d0 0x8>;
  190. status = "disabled";
  191. };
  192. uart0: serial@fffe0100 {
  193. compatible = "brcm,bcm6345-uart";
  194. reg = <0xfffe0100 0x18>;
  195. interrupt-parent = <&periph_intc>;
  196. interrupts = <BCM6358_IRQ_UART0>;
  197. clocks = <&periph_osc>;
  198. clock-names = "periph";
  199. status = "disabled";
  200. };
  201. uart1: serial@fffe0120 {
  202. compatible = "brcm,bcm6345-uart";
  203. reg = <0xfffe0120 0x18>;
  204. interrupt-parent = <&periph_intc>;
  205. interrupts = <BCM6358_IRQ_UART1>;
  206. clocks = <&periph_osc>;
  207. clock-names = "periph";
  208. status = "disabled";
  209. };
  210. lsspi: spi@fffe0800 {
  211. #address-cells = <1>;
  212. #size-cells = <0>;
  213. compatible = "brcm,bcm6358-spi";
  214. reg = <0xfffe0800 0x70c>;
  215. interrupt-parent = <&periph_intc>;
  216. interrupts = <BCM6358_IRQ_SPI>;
  217. clocks = <&periph_clk BCM6358_CLK_SPI>;
  218. clock-names = "spi";
  219. resets = <&periph_rst BCM6358_RST_SPI>;
  220. status = "disabled";
  221. };
  222. pci: pci@fffe1000 {
  223. compatible = "brcm,bcm6348-pci";
  224. reg = <0xfffe1000 0x200>;
  225. #address-cells = <3>;
  226. #size-cells = <2>;
  227. device_type = "pci";
  228. bus-range = <0x00 0x01>;
  229. ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
  230. <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
  231. linux,pci-probe-only = <1>;
  232. interrupt-parent = <&periph_intc>;
  233. interrupts = <BCM6358_IRQ_MPI>;
  234. resets = <&periph_rst BCM6358_RST_MPI>;
  235. reset-names = "pci";
  236. brcm,remap;
  237. status = "disabled";
  238. };
  239. ehci: usb@fffe1300 {
  240. compatible = "brcm,bcm6358-ehci", "generic-ehci";
  241. reg = <0xfffe1300 0x100>;
  242. big-endian;
  243. spurious-oc;
  244. interrupt-parent = <&periph_intc>;
  245. interrupts = <BCM6358_IRQ_EHCI>;
  246. phys = <&usbh 0>;
  247. phy-names = "usb";
  248. status = "disabled";
  249. };
  250. ohci: usb@fffe1400 {
  251. compatible = "brcm,bcm6358-ohci", "generic-ohci";
  252. reg = <0xfffe1400 0x100>;
  253. big-endian;
  254. no-big-frame-no;
  255. interrupt-parent = <&periph_intc>;
  256. interrupts = <BCM6358_IRQ_OHCI>;
  257. phys = <&usbh 0>;
  258. phy-names = "usb";
  259. status = "disabled";
  260. };
  261. usbh: usb-phy@fffe1500 {
  262. compatible = "brcm,bcm6358-usbh-phy";
  263. reg = <0xfffe1500 0x38>;
  264. #phy-cells = <1>;
  265. resets = <&periph_rst BCM6358_RST_USBH>;
  266. status = "disabled";
  267. };
  268. ethernet0: ethernet@fffe4000 {
  269. compatible = "brcm,bcm6358-emac";
  270. reg = <0xfffe4000 0x2dc>;
  271. clocks = <&periph_clk BCM6358_CLK_ENET0>;
  272. interrupt-parent = <&periph_intc>;
  273. interrupts = <BCM6358_IRQ_EMAC0>,
  274. <BCM6358_IRQ_EMAC0_RX_DMA>,
  275. <BCM6358_IRQ_EMAC0_TX_DMA>;
  276. interrupt-names = "emac",
  277. "rx",
  278. "tx";
  279. brcm,iudma = <&iudma>;
  280. dma-rx = <0>;
  281. dma-tx = <1>;
  282. status = "disabled";
  283. mdio0: mdio {
  284. #address-cells = <1>;
  285. #size-cells = <0>;
  286. };
  287. };
  288. ethernet1: ethernet@fffe4800 {
  289. compatible = "brcm,bcm6358-emac";
  290. reg = <0xfffe4800 0x2dc>;
  291. clocks = <&periph_clk BCM6358_CLK_ENET1>;
  292. interrupt-parent = <&periph_intc>;
  293. interrupts = <BCM6358_IRQ_EMAC1>,
  294. <BCM6358_IRQ_EMAC1_RX_DMA>,
  295. <BCM6358_IRQ_EMAC1_TX_DMA>;
  296. interrupt-names = "emac",
  297. "rx",
  298. "tx";
  299. brcm,iudma = <&iudma>;
  300. brcm,external-mii;
  301. dma-rx = <2>;
  302. dma-tx = <3>;
  303. status = "disabled";
  304. mdio1: mdio {
  305. #address-cells = <1>;
  306. #size-cells = <0>;
  307. };
  308. };
  309. iudma: dma@fffe5000 {
  310. #address-cells = <1>;
  311. #size-cells = <1>;
  312. compatible = "brcm,bcm6358-iudma";
  313. reg = <0xfffe5000 0x24>,
  314. <0xfffe5100 0x80>,
  315. <0xfffe5200 0x80>;
  316. reg-names = "dma",
  317. "dma-channels",
  318. "dma-sram";
  319. dma-channels = <8>;
  320. clocks = <&periph_clk BCM6358_CLK_EMUSB>,
  321. <&periph_clk BCM6358_CLK_USBSU>,
  322. <&periph_clk BCM6358_CLK_EPHY>,
  323. <&periph_clk BCM6358_CLK_ENET>;
  324. resets = <&periph_rst BCM6358_RST_ENET>,
  325. <&periph_rst BCM6358_RST_EPHY>;
  326. status = "disabled";
  327. };
  328. };
  329. };